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[ARM] S3C: Make common <plat/dma.h> header
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Move the common information from the <mach/dma.h> header into a new
shareable <plat/dma.h> header for re-use on the s3c64xx.

Signed-off-by: Ben Dooks <ben@simtec.co.uk>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
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Ben Dooks authored and Ben Dooks committed May 1, 2009
1 parent 023b40c commit c133c29
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Showing 2 changed files with 130 additions and 114 deletions.
117 changes: 3 additions & 114 deletions arch/arm/mach-s3c2410/include/mach/dma.h
Original file line number Diff line number Diff line change
Expand Up @@ -13,6 +13,7 @@
#ifndef __ASM_ARCH_DMA_H
#define __ASM_ARCH_DMA_H __FILE__

#include <plat/dma.h>
#include <linux/sysdev.h>
#include <mach/hardware.h>

Expand Down Expand Up @@ -103,32 +104,6 @@ enum s3c2410_dma_loadst {
S3C2410_DMALOAD_1LOADED_1RUNNING,
};

enum s3c2410_dma_buffresult {
S3C2410_RES_OK,
S3C2410_RES_ERR,
S3C2410_RES_ABORT
};

enum s3c2410_dmasrc {
S3C2410_DMASRC_HW, /* source is memory */
S3C2410_DMASRC_MEM /* source is hardware */
};

/* enum s3c2410_chan_op
*
* operation codes passed to the DMA code by the user, and also used
* to inform the current channel owner of any changes to the system state
*/

enum s3c2410_chan_op {
S3C2410_DMAOP_START,
S3C2410_DMAOP_STOP,
S3C2410_DMAOP_PAUSE,
S3C2410_DMAOP_RESUME,
S3C2410_DMAOP_FLUSH,
S3C2410_DMAOP_TIMEOUT, /* internal signal to handler */
S3C2410_DMAOP_STARTED, /* indicate channel started */
};

/* flags */

Expand All @@ -138,17 +113,14 @@ enum s3c2410_chan_op {

/* dma buffer */

struct s3c2410_dma_client {
char *name;
};
struct s3c2410_dma_buf;

/* s3c2410_dma_buf_s
/* s3c2410_dma_buf
*
* internally used buffer structure to describe a queued or running
* buffer.
*/

struct s3c2410_dma_buf;
struct s3c2410_dma_buf {
struct s3c2410_dma_buf *next;
int magic; /* magic */
Expand All @@ -160,20 +132,6 @@ struct s3c2410_dma_buf {

/* [1] is this updated for both recv/send modes? */

struct s3c2410_dma_chan;

/* s3c2410_dma_cbfn_t
*
* buffer callback routine type
*/

typedef void (*s3c2410_dma_cbfn_t)(struct s3c2410_dma_chan *,
void *buf, int size,
enum s3c2410_dma_buffresult result);

typedef int (*s3c2410_dma_opfn_t)(struct s3c2410_dma_chan *,
enum s3c2410_chan_op );

struct s3c2410_dma_stats {
unsigned long loads;
unsigned long timeout_longest;
Expand Down Expand Up @@ -241,73 +199,4 @@ extern struct s3c2410_dma_chan s3c2410_chans[];
/* note, we don't really use dma_device_t at the moment */
typedef unsigned long dma_device_t;

/* functions --------------------------------------------------------------- */

/* s3c2410_dma_request
*
* request a dma channel exclusivley
*/

extern int s3c2410_dma_request(unsigned int channel,
struct s3c2410_dma_client *, void *dev);


/* s3c2410_dma_ctrl
*
* change the state of the dma channel
*/

extern int s3c2410_dma_ctrl(unsigned int channel, enum s3c2410_chan_op op);

/* s3c2410_dma_setflags
*
* set the channel's flags to a given state
*/

extern int s3c2410_dma_setflags(unsigned int channel,
unsigned int flags);

/* s3c2410_dma_free
*
* free the dma channel (will also abort any outstanding operations)
*/

extern int s3c2410_dma_free(unsigned int channel, struct s3c2410_dma_client *);

/* s3c2410_dma_enqueue
*
* place the given buffer onto the queue of operations for the channel.
* The buffer must be allocated from dma coherent memory, or the Dcache/WB
* drained before the buffer is given to the DMA system.
*/

extern int s3c2410_dma_enqueue(unsigned int channel, void *id,
dma_addr_t data, int size);

/* s3c2410_dma_config
*
* configure the dma channel
*/

extern int s3c2410_dma_config(unsigned int channel, int xferunit);

/* s3c2410_dma_devconfig
*
* configure the device we're talking to
*/

extern int s3c2410_dma_devconfig(int channel, enum s3c2410_dmasrc source,
unsigned long devaddr);

/* s3c2410_dma_getposition
*
* get the position that the dma transfer is currently at
*/

extern int s3c2410_dma_getposition(unsigned int channel,
dma_addr_t *src, dma_addr_t *dest);

extern int s3c2410_dma_set_opfn(unsigned int, s3c2410_dma_opfn_t rtn);
extern int s3c2410_dma_set_buffdone_fn(unsigned int, s3c2410_dma_cbfn_t rtn);

#endif /* __ASM_ARCH_DMA_H */
127 changes: 127 additions & 0 deletions arch/arm/plat-s3c/include/plat/dma.h
Original file line number Diff line number Diff line change
@@ -0,0 +1,127 @@
/* arch/arm/plat-s3c/include/plat/dma.h
*
* Copyright (C) 2003,2004,2006 Simtec Electronics
* Ben Dooks <ben@simtec.co.uk>
*
* Samsung S3C DMA support
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/

enum s3c2410_dma_buffresult {
S3C2410_RES_OK,
S3C2410_RES_ERR,
S3C2410_RES_ABORT
};

enum s3c2410_dmasrc {
S3C2410_DMASRC_HW, /* source is memory */
S3C2410_DMASRC_MEM /* source is hardware */
};

/* enum s3c2410_chan_op
*
* operation codes passed to the DMA code by the user, and also used
* to inform the current channel owner of any changes to the system state
*/

enum s3c2410_chan_op {
S3C2410_DMAOP_START,
S3C2410_DMAOP_STOP,
S3C2410_DMAOP_PAUSE,
S3C2410_DMAOP_RESUME,
S3C2410_DMAOP_FLUSH,
S3C2410_DMAOP_TIMEOUT, /* internal signal to handler */
S3C2410_DMAOP_STARTED, /* indicate channel started */
};

struct s3c2410_dma_client {
char *name;
};

struct s3c2410_dma_chan;

/* s3c2410_dma_cbfn_t
*
* buffer callback routine type
*/

typedef void (*s3c2410_dma_cbfn_t)(struct s3c2410_dma_chan *,
void *buf, int size,
enum s3c2410_dma_buffresult result);

typedef int (*s3c2410_dma_opfn_t)(struct s3c2410_dma_chan *,
enum s3c2410_chan_op );



/* s3c2410_dma_request
*
* request a dma channel exclusivley
*/

extern int s3c2410_dma_request(unsigned int channel,
struct s3c2410_dma_client *, void *dev);


/* s3c2410_dma_ctrl
*
* change the state of the dma channel
*/

extern int s3c2410_dma_ctrl(unsigned int channel, enum s3c2410_chan_op op);

/* s3c2410_dma_setflags
*
* set the channel's flags to a given state
*/

extern int s3c2410_dma_setflags(unsigned int channel,
unsigned int flags);

/* s3c2410_dma_free
*
* free the dma channel (will also abort any outstanding operations)
*/

extern int s3c2410_dma_free(unsigned int channel, struct s3c2410_dma_client *);

/* s3c2410_dma_enqueue
*
* place the given buffer onto the queue of operations for the channel.
* The buffer must be allocated from dma coherent memory, or the Dcache/WB
* drained before the buffer is given to the DMA system.
*/

extern int s3c2410_dma_enqueue(unsigned int channel, void *id,
dma_addr_t data, int size);

/* s3c2410_dma_config
*
* configure the dma channel
*/

extern int s3c2410_dma_config(unsigned int channel, int xferunit);

/* s3c2410_dma_devconfig
*
* configure the device we're talking to
*/

extern int s3c2410_dma_devconfig(int channel, enum s3c2410_dmasrc source,
unsigned long devaddr);

/* s3c2410_dma_getposition
*
* get the position that the dma transfer is currently at
*/

extern int s3c2410_dma_getposition(unsigned int channel,
dma_addr_t *src, dma_addr_t *dest);

extern int s3c2410_dma_set_opfn(unsigned int, s3c2410_dma_opfn_t rtn);
extern int s3c2410_dma_set_buffdone_fn(unsigned int, s3c2410_dma_cbfn_t rtn);


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