Skip to content

Commit

Permalink
Staging: VME: PIO2: Correct irq reset
Browse files Browse the repository at this point in the history
The loop used to reset the interrupt masks has faulty logic. There are 4
banks of 8 I/O, however each mask is comprised of 2 bits and thus there are
8 sets of registers to clear. Driver was wrongly equating this with 8 banks
leading to a us writing past the end of the "bank" array (used to store mask
configuration as these registers are write only) and thus causing memory
corruption. Clear both registers of masks for each bank and half iterations.

Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Martyn Welch <martyn.welch@ge.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
  • Loading branch information
Martyn Welch authored and Greg Kroah-Hartman committed Nov 30, 2011
1 parent 6d3ff1c commit c1fcc4c
Showing 1 changed file with 7 additions and 2 deletions.
9 changes: 7 additions & 2 deletions drivers/staging/vme/devices/vme_pio2_gpio.c
Original file line number Diff line number Diff line change
Expand Up @@ -159,9 +159,14 @@ int pio2_gpio_reset(struct pio2_card *card)
}

/* Set input interrupt masks */
for (i = 0; i < 8; i++) {
for (i = 0; i < 4; i++) {
retval = vme_master_write(card->window, &data, 1,
PIO2_REGS_INT_MASK[i * 2]);
if (retval < 0)
return retval;

retval = vme_master_write(card->window, &data, 1,
PIO2_REGS_INT_MASK[i]);
PIO2_REGS_INT_MASK[(i * 2) + 1]);
if (retval < 0)
return retval;

Expand Down

0 comments on commit c1fcc4c

Please sign in to comment.