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yaml
---
r: 123316
b: refs/heads/master
c: 64f2dde
h: refs/heads/master
v: v3
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David S. Miller committed Dec 4, 2008
1 parent 1be03b2 commit c1ff04b
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Showing 4 changed files with 13 additions and 18 deletions.
2 changes: 1 addition & 1 deletion [refs]
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---
refs/heads/master: c9bb6003dd096ad190e1594a7d835ae1c39fae8f
refs/heads/master: 64f2dde3f743c8a1ad8c0a1aa74166c1034afd92
17 changes: 6 additions & 11 deletions trunk/arch/sparc/include/asm/spinlock_64.h
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Expand Up @@ -13,17 +13,12 @@
* and rebuild your kernel.
*/

/* All of these locking primitives are expected to work properly
* even in an RMO memory model, which currently is what the kernel
* runs in.
*
* There is another issue. Because we play games to save cycles
* in the non-contention case, we need to be extra careful about
* branch targets into the "spinning" code. They live in their
* own section, but the newer V9 branches have a shorter range
* than the traditional 32-bit sparc branch variants. The rule
* is that the branches that go into and out of the spinner sections
* must be pre-V9 branches.
/* Because we play games to save cycles in the non-contention case, we
* need to be extra careful about branch targets into the "spinning"
* code. They live in their own section, but the newer V9 branches
* have a shorter range than the traditional 32-bit sparc branch
* variants. The rule is that the branches that go into and out of
* the spinner sections must be pre-V9 branches.
*/

#define __raw_spin_is_locked(lp) ((lp)->lock != 0)
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6 changes: 3 additions & 3 deletions trunk/arch/sparc64/kernel/etrap.S
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Expand Up @@ -16,9 +16,9 @@
#include <asm/mmu.h>

#define TASK_REGOFF (THREAD_SIZE-TRACEREG_SZ-STACKFRAME_SZ)
#define ETRAP_PSTATE1 (PSTATE_RMO | PSTATE_PRIV)
#define ETRAP_PSTATE1 (PSTATE_TSO | PSTATE_PRIV)
#define ETRAP_PSTATE2 \
(PSTATE_RMO | PSTATE_PEF | PSTATE_PRIV | PSTATE_IE)
(PSTATE_TSO | PSTATE_PEF | PSTATE_PRIV | PSTATE_IE)

/*
* On entry, %g7 is return address - 0x4.
Expand Down Expand Up @@ -130,7 +130,7 @@ etrap_save: save %g2, -STACK_BIAS, %sp
stx %g6, [%sp + PTREGS_OFF + PT_V9_G6]
stx %g7, [%sp + PTREGS_OFF + PT_V9_G7]
or %l7, %l0, %l7
sethi %hi(TSTATE_RMO | TSTATE_PEF), %l0
sethi %hi(TSTATE_TSO | TSTATE_PEF), %l0
or %l7, %l0, %l7
wrpr %l2, %tnpc
wrpr %l7, (TSTATE_PRIV | TSTATE_IE), %tstate
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6 changes: 3 additions & 3 deletions trunk/arch/sparc64/kernel/rtrap.S
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Expand Up @@ -14,9 +14,9 @@
#include <asm/visasm.h>
#include <asm/processor.h>

#define RTRAP_PSTATE (PSTATE_RMO|PSTATE_PEF|PSTATE_PRIV|PSTATE_IE)
#define RTRAP_PSTATE_IRQOFF (PSTATE_RMO|PSTATE_PEF|PSTATE_PRIV)
#define RTRAP_PSTATE_AG_IRQOFF (PSTATE_RMO|PSTATE_PEF|PSTATE_PRIV|PSTATE_AG)
#define RTRAP_PSTATE (PSTATE_TSO|PSTATE_PEF|PSTATE_PRIV|PSTATE_IE)
#define RTRAP_PSTATE_IRQOFF (PSTATE_TSO|PSTATE_PEF|PSTATE_PRIV)
#define RTRAP_PSTATE_AG_IRQOFF (PSTATE_TSO|PSTATE_PEF|PSTATE_PRIV|PSTATE_AG)

.text
.align 32
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