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r: 363257
b: refs/heads/master
c: 7ad530b
h: refs/heads/master
i:
  363255: 6872bca
v: v3
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Erik Gilling authored and Greg Kroah-Hartman committed Mar 4, 2013
1 parent fd70fb0 commit c4e3414
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2 changes: 1 addition & 1 deletion [refs]
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---
refs/heads/master: 2794b5d408c625e104de813d3de7ac0ec34d46d9
refs/heads/master: 7ad530bf2499c702a6dcbb279cf78b76845ed584
14 changes: 3 additions & 11 deletions trunk/CREDITS
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Expand Up @@ -953,11 +953,11 @@ S: Blacksburg, Virginia 24061
S: USA

N: Randy Dunlap
E: rdunlap@infradead.org
W: http://www.infradead.org/~rdunlap/
E: rdunlap@xenotime.net
W: http://www.xenotime.net/linux/linux.html
W: http://www.linux-usb.org
D: Linux-USB subsystem, USB core/UHCI/printer/storage drivers
D: x86 SMP, ACPI, bootflag hacking
D: documentation, builds
S: (ask for current address)
S: USA

Expand Down Expand Up @@ -1510,14 +1510,6 @@ D: Natsemi ethernet
D: Cobalt Networks (x86) support
D: This-and-That

N: Mark M. Hoffman
E: mhoffman@lightlink.com
D: asb100, lm93 and smsc47b397 hardware monitoring drivers
D: hwmon subsystem core
D: hwmon subsystem maintainer
D: i2c-sis96x and i2c-stub SMBus drivers
S: USA

N: Dirk Hohndel
E: hohndel@suse.de
D: The XFree86[tm] Project
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7 changes: 0 additions & 7 deletions trunk/Documentation/ABI/testing/sysfs-bus-mei
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12 changes: 0 additions & 12 deletions trunk/Documentation/ABI/testing/sysfs-devices-system-cpu
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Expand Up @@ -173,15 +173,3 @@ Description: Processor frequency boosting control
Boosting allows the CPU and the firmware to run at a frequency
beyound it's nominal limit.
More details can be found in Documentation/cpu-freq/boost.txt


What: /sys/devices/system/cpu/cpu#/crash_notes
/sys/devices/system/cpu/cpu#/crash_notes_size
Date: April 2013
Contact: kexec@lists.infradead.org
Description: address and size of the percpu note.

crash_notes: the physical address of the memory that holds the
note of cpu#.

crash_notes_size: size of the note of cpu#.
2 changes: 1 addition & 1 deletion trunk/Documentation/DocBook/device-drivers.tmpl
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Expand Up @@ -227,7 +227,7 @@ X!Isound/sound_firmware.c
<chapter id="uart16x50">
<title>16x50 UART Driver</title>
!Edrivers/tty/serial/serial_core.c
!Edrivers/tty/serial/8250/8250_core.c
!Edrivers/tty/serial/8250/8250.c
</chapter>

<chapter id="fbdev">
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3 changes: 2 additions & 1 deletion trunk/Documentation/SubmittingPatches
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Expand Up @@ -60,7 +60,8 @@ own source tree. For example:
"dontdiff" is a list of files which are generated by the kernel during
the build process, and should be ignored in any diff(1)-generated
patch. The "dontdiff" file is included in the kernel tree in
2.6.12 and later.
2.6.12 and later. For earlier kernel versions, you can get it
from <http://www.xenotime.net/linux/doc/dontdiff>.

Make sure your patch does not include any extra files which do not
belong in a patch submission. Make sure to review your patch -after-
Expand Down
44 changes: 7 additions & 37 deletions trunk/Documentation/device-mapper/dm-raid.txt
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Expand Up @@ -30,7 +30,6 @@ The target is named "raid" and it accepts the following parameters:
raid10 Various RAID10 inspired algorithms chosen by additional params
- RAID10: Striped Mirrors (aka 'Striping on top of mirrors')
- RAID1E: Integrated Adjacent Stripe Mirroring
- RAID1E: Integrated Offset Stripe Mirroring
- and other similar RAID10 variants

Reference: Chapter 4 of
Expand Down Expand Up @@ -65,15 +64,15 @@ The target is named "raid" and it accepts the following parameters:
synchronisation state for each region.

[raid10_copies <# copies>]
[raid10_format <near|far|offset>]
[raid10_format near]
These two options are used to alter the default layout of
a RAID10 configuration. The number of copies is can be
specified, but the default is 2. There are also three
variations to how the copies are laid down - the default
is "near". Near copies are what most people think of with
respect to mirroring. If these options are left unspecified,
or 'raid10_copies 2' and/or 'raid10_format near' are given,
then the layouts for 2, 3 and 4 devices are:
specified, but the default is 2. There are other variations
to how the copies are laid down - the default and only current
option is "near". Near copies are what most people think of
with respect to mirroring. If these options are left
unspecified, or 'raid10_copies 2' and/or 'raid10_format near'
are given, then the layouts for 2, 3 and 4 devices are:
2 drives 3 drives 4 drives
-------- ---------- --------------
A1 A1 A1 A1 A2 A1 A1 A2 A2
Expand All @@ -86,33 +85,6 @@ The target is named "raid" and it accepts the following parameters:
3-device layout is what might be called a 'RAID1E - Integrated
Adjacent Stripe Mirroring'.

If 'raid10_copies 2' and 'raid10_format far', then the layouts
for 2, 3 and 4 devices are:
2 drives 3 drives 4 drives
-------- -------------- --------------------
A1 A2 A1 A2 A3 A1 A2 A3 A4
A3 A4 A4 A5 A6 A5 A6 A7 A8
A5 A6 A7 A8 A9 A9 A10 A11 A12
.. .. .. .. .. .. .. .. ..
A2 A1 A3 A1 A2 A2 A1 A4 A3
A4 A3 A6 A4 A5 A6 A5 A8 A7
A6 A5 A9 A7 A8 A10 A9 A12 A11
.. .. .. .. .. .. .. .. ..

If 'raid10_copies 2' and 'raid10_format offset', then the
layouts for 2, 3 and 4 devices are:
2 drives 3 drives 4 drives
-------- ------------ -----------------
A1 A2 A1 A2 A3 A1 A2 A3 A4
A2 A1 A3 A1 A2 A2 A1 A4 A3
A3 A4 A4 A5 A6 A5 A6 A7 A8
A4 A3 A6 A4 A5 A6 A5 A8 A7
A5 A6 A7 A8 A9 A9 A10 A11 A12
A6 A5 A9 A7 A8 A10 A9 A12 A11
.. .. .. .. .. .. .. .. ..
Here we see layouts closely akin to 'RAID1E - Integrated
Offset Stripe Mirroring'.

<#raid_devs>: The number of devices composing the array.
Each device consists of two entries. The first is the device
containing the metadata (if any); the second is the one containing the
Expand Down Expand Up @@ -170,5 +142,3 @@ Version History
1.3.0 Added support for RAID 10
1.3.1 Allow device replacement/rebuild for RAID 10
1.3.2 Fix/improve redundancy checking for RAID10
1.4.0 Non-functional change. Removes arg from mapping function.
1.4.1 Add RAID10 "far" and "offset" algorithm support.
18 changes: 0 additions & 18 deletions trunk/Documentation/devicetree/bindings/arm/msm/ssbi.txt
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6 changes: 3 additions & 3 deletions trunk/Documentation/devicetree/bindings/gpio/gpio.txt
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Expand Up @@ -98,7 +98,7 @@ announce the pinrange to the pin ctrl subsystem. For example,
compatible = "fsl,qe-pario-bank-e", "fsl,qe-pario-bank";
reg = <0x1460 0x18>;
gpio-controller;
gpio-ranges = <&pinctrl1 0 20 10>, <&pinctrl2 10 50 20>;
gpio-ranges = <&pinctrl1 20 10>, <&pinctrl2 50 20>;

}

Expand All @@ -107,8 +107,8 @@ where,

Next values specify the base pin and number of pins for the range
handled by 'qe_pio_e' gpio. In the given example from base pin 20 to
pin 29 under pinctrl1 with gpio offset 0 and pin 50 to pin 69 under
pinctrl2 with gpio offset 10 is handled by this gpio controller.
pin 29 under pinctrl1 and pin 50 to pin 69 under pinctrl2 is handled
by this gpio controller.

The pinctrl node must have "#gpio-range-cells" property to show number of
arguments to pass with phandle from gpio controllers node.
29 changes: 0 additions & 29 deletions trunk/Documentation/devicetree/bindings/hwmon/ntc_thermistor.txt
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6 changes: 5 additions & 1 deletion trunk/Documentation/devicetree/bindings/mfd/ab8500.txt
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Expand Up @@ -13,6 +13,9 @@ Required parent device properties:
4 = active high level-sensitive
8 = active low level-sensitive

Optional parent device properties:
- reg : contains the PRCMU mailbox address for the AB8500 i2c port

The AB8500 consists of a large and varied group of sub-devices:

Device IRQ Names Supply Names Description
Expand Down Expand Up @@ -83,8 +86,9 @@ Non-standard child device properties:
- stericsson,amic2-bias-vamic1 : Analoge Mic wishes to use a non-standard Vamic
- stericsson,earpeice-cmv : Earpeice voltage (only: 950 | 1100 | 1270 | 1580)

ab8500 {
ab8500@5 {
compatible = "stericsson,ab8500";
reg = <5>; /* mailbox 5 is i2c */
interrupts = <0 40 0x4>;
interrupt-controller;
#interrupt-cells = <2>;
Expand Down
109 changes: 2 additions & 107 deletions trunk/Documentation/devicetree/bindings/pinctrl/pinctrl-single.txt
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@@ -1,9 +1,7 @@
One-register-per-pin type device tree based pinctrl driver

Required properties:
- compatible : "pinctrl-single" or "pinconf-single".
"pinctrl-single" means that pinconf isn't supported.
"pinconf-single" means that generic pinconf is supported.
- compatible : "pinctrl-single"

- reg : offset and length of the register set for the mux registers

Expand All @@ -16,61 +14,9 @@ Optional properties:
- pinctrl-single,function-off : function off mode for disabled state if
available and same for all registers; if not specified, disabling of
pin functions is ignored

- pinctrl-single,bit-per-mux : boolean to indicate that one register controls
more than one pin

- pinctrl-single,drive-strength : array of value that are used to configure
drive strength in the pinmux register. They're value of drive strength
current and drive strength mask.

/* drive strength current, mask */
pinctrl-single,power-source = <0x30 0xf0>;

- pinctrl-single,bias-pullup : array of value that are used to configure the
input bias pullup in the pinmux register.

/* input, enabled pullup bits, disabled pullup bits, mask */
pinctrl-single,bias-pullup = <0 1 0 1>;

- pinctrl-single,bias-pulldown : array of value that are used to configure the
input bias pulldown in the pinmux register.

/* input, enabled pulldown bits, disabled pulldown bits, mask */
pinctrl-single,bias-pulldown = <2 2 0 2>;

* Two bits to control input bias pullup and pulldown: User should use
pinctrl-single,bias-pullup & pinctrl-single,bias-pulldown. One bit means
pullup, and the other one bit means pulldown.
* Three bits to control input bias enable, pullup and pulldown. User should
use pinctrl-single,bias-pullup & pinctrl-single,bias-pulldown. Input bias
enable bit should be included in pullup or pulldown bits.
* Although driver could set PIN_CONFIG_BIAS_DISABLE, there's no property as
pinctrl-single,bias-disable. Because pinctrl single driver could implement
it by calling pulldown, pullup disabled.

- pinctrl-single,input-schmitt : array of value that are used to configure
input schmitt in the pinmux register. In some silicons, there're two input
schmitt value (rising-edge & falling-edge) in the pinmux register.

/* input schmitt value, mask */
pinctrl-single,input-schmitt = <0x30 0x70>;

- pinctrl-single,input-schmitt-enable : array of value that are used to
configure input schmitt enable or disable in the pinmux register.

/* input, enable bits, disable bits, mask */
pinctrl-single,input-schmitt-enable = <0x30 0x40 0 0x70>;

- pinctrl-single,gpio-range : list of value that are used to configure a GPIO
range. They're value of subnode phandle, pin base in pinctrl device, pin
number in this range, GPIO function value of this GPIO range.
The number of parameters is depend on #pinctrl-single,gpio-range-cells
property.

/* pin base, nr pins & gpio function */
pinctrl-single,gpio-range = <&range 0 3 0 &range 3 9 1>;

This driver assumes that there is only one register for each pin (unless the
pinctrl-single,bit-per-mux is set), and uses the common pinctrl bindings as
specified in the pinctrl-bindings.txt document in this directory.
Expand All @@ -96,20 +42,6 @@ Where 0xdc is the offset from the pinctrl register base address for the
device pinctrl register, 0x18 is the desired value, and 0xff is the sub mask to
be used when applying this change to the register.


Optional sub-node: In case some pins could be configured as GPIO in the pinmux
register, those pins could be defined as a GPIO range. This sub-node is required
by pinctrl-single,gpio-range property.

Required properties in sub-node:
- #pinctrl-single,gpio-range-cells : the number of parameters after phandle in
pinctrl-single,gpio-range property.

range: gpio-range {
#pinctrl-single,gpio-range-cells = <3>;
};


Example:

/* SoC common file */
Expand All @@ -126,7 +58,7 @@ pmx_core: pinmux@4a100040 {

/* second controller instance for pins in wkup domain */
pmx_wkup: pinmux@4a31e040 {
compatible = "pinctrl-single";
compatible = "pinctrl-single;
reg = <0x4a31e040 0x0038>;
#address-cells = <1>;
#size-cells = <0>;
Expand All @@ -144,29 +76,6 @@ control_devconf0: pinmux@48002274 {
pinctrl-single,function-mask = <0x5F>;
};

/* third controller instance for pins in gpio domain */
pmx_gpio: pinmux@d401e000 {
compatible = "pinconf-single";
reg = <0xd401e000 0x0330>;
#address-cells = <1>;
#size-cells = <1>;
ranges;

pinctrl-single,register-width = <32>;
pinctrl-single,function-mask = <7>;

/* sparse GPIO range could be supported */
pinctrl-single,gpio-range = <&range 0 3 0 &range 3 9 1
&range 12 1 0 &range 13 29 1
&range 43 1 0 &range 44 49 1
&range 94 1 1 &range 96 2 1>;

range: gpio-range {
#pinctrl-single,gpio-range-cells = <3>;
};
};


/* board specific .dts file */

&pmx_core {
Expand All @@ -187,15 +96,6 @@ pmx_gpio: pinmux@d401e000 {
>;
};

uart0_pins: pinmux_uart0_pins {
pinctrl-single,pins = <
0x208 0 /* UART0_RXD (IOCFG138) */
0x20c 0 /* UART0_TXD (IOCFG139) */
>;
pinctrl-single,bias-pulldown = <0 2 2>;
pinctrl-single,bias-pullup = <0 1 1>;
};

/* map uart2 pins */
uart2_pins: pinmux_uart2_pins {
pinctrl-single,pins = <
Expand All @@ -222,11 +122,6 @@ pmx_gpio: pinmux@d401e000 {

};

&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins>;
};

&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&uart2_pins>;
Expand Down
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