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yaml
---
r: 328128
b: refs/heads/master
c: b5a0447
h: refs/heads/master
v: v3
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Steve Glendinning authored and David S. Miller committed Sep 28, 2012
1 parent 63a960d commit c4f026d
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Showing 3 changed files with 33 additions and 3 deletions.
2 changes: 1 addition & 1 deletion [refs]
Original file line number Diff line number Diff line change
@@ -1,2 +1,2 @@
---
refs/heads/master: c954679cf76095b0a1232c3dad604a9066d78ab1
refs/heads/master: b5a044758672b6dc775fdab007337b47a54576f4
28 changes: 27 additions & 1 deletion trunk/drivers/net/usb/smsc95xx.c
Original file line number Diff line number Diff line change
Expand Up @@ -1018,6 +1018,32 @@ static void smsc95xx_unbind(struct usbnet *dev, struct usb_interface *intf)
}
}

static int smsc95xx_suspend(struct usb_interface *intf, pm_message_t message)
{
struct usbnet *dev = usb_get_intfdata(intf);
int ret;
u32 val;

if (WARN_ON_ONCE(!dev))
return -EINVAL;

ret = usbnet_suspend(intf, message);
check_warn_return(ret, "usbnet_suspend error");

netdev_info(dev->net, "entering SUSPEND2 mode");

ret = smsc95xx_read_reg(dev, PM_CTRL, &val);
check_warn_return(ret, "Error reading PM_CTRL");

val &= ~(PM_CTL_SUS_MODE_ | PM_CTL_WUPS_ | PM_CTL_PHY_RST_);
val |= PM_CTL_SUS_MODE_2;

ret = smsc95xx_write_reg(dev, PM_CTRL, val);
check_warn_return(ret, "Error writing PM_CTRL");

return 0;
}

static void smsc95xx_rx_csum_offload(struct sk_buff *skb)
{
skb->csum = *(u16 *)(skb_tail_pointer(skb) - 2);
Expand Down Expand Up @@ -1280,7 +1306,7 @@ static struct usb_driver smsc95xx_driver = {
.name = "smsc95xx",
.id_table = products,
.probe = usbnet_probe,
.suspend = usbnet_suspend,
.suspend = smsc95xx_suspend,
.resume = usbnet_resume,
.reset_resume = usbnet_resume,
.disconnect = usbnet_disconnect,
Expand Down
6 changes: 5 additions & 1 deletion trunk/drivers/net/usb/smsc95xx.h
Original file line number Diff line number Diff line change
Expand Up @@ -84,12 +84,16 @@
#define HW_CFG_BCE_ (0x00000002)
#define HW_CFG_SRST_ (0x00000001)

#define RX_FIFO_INF (0x18)

#define PM_CTRL (0x20)
#define PM_CTL_RES_CLR_WKP_STS (0x00000200)
#define PM_CTL_DEV_RDY_ (0x00000080)
#define PM_CTL_SUS_MODE_ (0x00000060)
#define PM_CTL_SUS_MODE_0 (0x00000000)
#define PM_CTL_SUS_MODE_1 (0x00000020)
#define PM_CTL_SUS_MODE_2 (0x00000060)
#define PM_CTL_SUS_MODE_2 (0x00000040)
#define PM_CTL_SUS_MODE_3 (0x00000060)
#define PM_CTL_PHY_RST_ (0x00000010)
#define PM_CTL_WOL_EN_ (0x00000008)
#define PM_CTL_ED_EN_ (0x00000004)
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