Skip to content

Commit

Permalink
[media] V4L: ov9740: Fixed some settings
Browse files Browse the repository at this point in the history
Based on vendor feedback, should issue a software reset at start of day.

Also, OV9740_ANALOG_CTRL15 needs to be changed so the sensor does not begin
streaming until it is ready (otherwise, results in a nonsense frame for the
initial frame).

Added a comment on using discontinuous clock.

Finally, OV9740_ISP_CTRL19 needs to be changed to really use YUYV ordering
(the previous value was for VYUY).

Signed-off-by: Andrew Chew <achew@nvidia.com>
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
  • Loading branch information
Andrew Chew authored and Mauro Carvalho Chehab committed Jul 27, 2011
1 parent 5fec8b9 commit c4fdce5
Showing 1 changed file with 9 additions and 1 deletion.
10 changes: 9 additions & 1 deletion drivers/media/video/ov9740.c
Original file line number Diff line number Diff line change
Expand Up @@ -68,6 +68,7 @@
#define OV9740_ANALOG_CTRL04 0x3604
#define OV9740_ANALOG_CTRL10 0x3610
#define OV9740_ANALOG_CTRL12 0x3612
#define OV9740_ANALOG_CTRL15 0x3615
#define OV9740_ANALOG_CTRL20 0x3620
#define OV9740_ANALOG_CTRL21 0x3621
#define OV9740_ANALOG_CTRL22 0x3622
Expand Down Expand Up @@ -222,6 +223,9 @@ struct ov9740_priv {
};

static const struct ov9740_reg ov9740_defaults[] = {
/* Software Reset */
{ OV9740_SOFTWARE_RESET, 0x01 },

/* Banding Filter */
{ OV9740_AEC_B50_STEP_HI, 0x00 },
{ OV9740_AEC_B50_STEP_LO, 0xe8 },
Expand Down Expand Up @@ -333,6 +337,7 @@ static const struct ov9740_reg ov9740_defaults[] = {
{ OV9740_ANALOG_CTRL10, 0xa1 },
{ OV9740_ANALOG_CTRL12, 0x24 },
{ OV9740_ANALOG_CTRL22, 0x9f },
{ OV9740_ANALOG_CTRL15, 0xf0 },

/* Sensor Control */
{ OV9740_SENSOR_CTRL03, 0x42 },
Expand Down Expand Up @@ -385,14 +390,17 @@ static const struct ov9740_reg ov9740_defaults[] = {
{ OV9740_LN_LENGTH_PCK_LO, 0x62 },

/* MIPI Control */
{ OV9740_MIPI_CTRL00, 0x44 },
{ OV9740_MIPI_CTRL00, 0x44 }, /* 0x64 for discontinuous clk */
{ OV9740_MIPI_3837, 0x01 },
{ OV9740_MIPI_CTRL01, 0x0f },
{ OV9740_MIPI_CTRL03, 0x05 },
{ OV9740_MIPI_CTRL05, 0x10 },
{ OV9740_VFIFO_RD_CTRL, 0x16 },
{ OV9740_MIPI_CTRL_3012, 0x70 },
{ OV9740_SC_CMMM_MIPI_CTR, 0x01 },

/* YUYV order */
{ OV9740_ISP_CTRL19, 0x02 },
};

static const struct ov9740_reg ov9740_regs_vga[] = {
Expand Down

0 comments on commit c4fdce5

Please sign in to comment.