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yaml
---
r: 42360
b: refs/heads/master
c: 0004a9d
h: refs/heads/master
v: v3
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Ralf Baechle committed Dec 4, 2006
1 parent 6016383 commit c533d87
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Showing 9 changed files with 226 additions and 213 deletions.
2 changes: 1 addition & 1 deletion [refs]
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Original file line number Diff line number Diff line change
@@ -1,2 +1,2 @@
---
refs/heads/master: 08f57f7ffe5819e537301b1f1109fa4fc670bfff
refs/heads/master: 0004a9dfeaa709a7f853487aba19932c9b1a87c8
4 changes: 4 additions & 0 deletions trunk/arch/mips/Kconfig
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Original file line number Diff line number Diff line change
Expand Up @@ -1277,6 +1277,7 @@ config CPU_RM9000
select CPU_SUPPORTS_32BIT_KERNEL
select CPU_SUPPORTS_64BIT_KERNEL
select CPU_SUPPORTS_HIGHMEM
select WEAK_ORDERING

config CPU_SB1
bool "SB1"
Expand All @@ -1285,6 +1286,7 @@ config CPU_SB1
select CPU_SUPPORTS_32BIT_KERNEL
select CPU_SUPPORTS_64BIT_KERNEL
select CPU_SUPPORTS_HIGHMEM
select WEAK_ORDERING

endchoice

Expand Down Expand Up @@ -1345,6 +1347,8 @@ config SYS_HAS_CPU_RM9000
config SYS_HAS_CPU_SB1
bool

config WEAK_ORDERING
bool
endmenu

#
Expand Down
6 changes: 3 additions & 3 deletions trunk/arch/mips/kernel/smp.c
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Original file line number Diff line number Diff line change
Expand Up @@ -172,7 +172,7 @@ int smp_call_function (void (*func) (void *info), void *info, int retry,

spin_lock(&smp_call_lock);
call_data = &data;
mb();
smp_mb();

/* Send a message to all other CPUs and wait for them to respond */
for_each_online_cpu(i)
Expand Down Expand Up @@ -204,7 +204,7 @@ void smp_call_function_interrupt(void)
* Notify initiating CPU that I've grabbed the data and am
* about to execute the function.
*/
mb();
smp_mb();
atomic_inc(&call_data->started);

/*
Expand All @@ -215,7 +215,7 @@ void smp_call_function_interrupt(void)
irq_exit();

if (wait) {
mb();
smp_mb();
atomic_inc(&call_data->finished);
}
}
Expand Down
37 changes: 25 additions & 12 deletions trunk/include/asm-mips/atomic.h
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Original file line number Diff line number Diff line change
Expand Up @@ -15,6 +15,7 @@
#define _ASM_ATOMIC_H

#include <linux/irqflags.h>
#include <asm/barrier.h>
#include <asm/cpu-features.h>
#include <asm/war.h>

Expand Down Expand Up @@ -130,6 +131,8 @@ static __inline__ int atomic_add_return(int i, atomic_t * v)
{
unsigned long result;

smp_mb();

if (cpu_has_llsc && R10000_LLSC_WAR) {
unsigned long temp;

Expand All @@ -140,7 +143,6 @@ static __inline__ int atomic_add_return(int i, atomic_t * v)
" sc %0, %2 \n"
" beqzl %0, 1b \n"
" addu %0, %1, %3 \n"
" sync \n"
" .set mips0 \n"
: "=&r" (result), "=&r" (temp), "=m" (v->counter)
: "Ir" (i), "m" (v->counter)
Expand All @@ -155,7 +157,6 @@ static __inline__ int atomic_add_return(int i, atomic_t * v)
" sc %0, %2 \n"
" beqz %0, 1b \n"
" addu %0, %1, %3 \n"
" sync \n"
" .set mips0 \n"
: "=&r" (result), "=&r" (temp), "=m" (v->counter)
: "Ir" (i), "m" (v->counter)
Expand All @@ -170,13 +171,17 @@ static __inline__ int atomic_add_return(int i, atomic_t * v)
local_irq_restore(flags);
}

smp_mb();

return result;
}

static __inline__ int atomic_sub_return(int i, atomic_t * v)
{
unsigned long result;

smp_mb();

if (cpu_has_llsc && R10000_LLSC_WAR) {
unsigned long temp;

Expand All @@ -187,7 +192,6 @@ static __inline__ int atomic_sub_return(int i, atomic_t * v)
" sc %0, %2 \n"
" beqzl %0, 1b \n"
" subu %0, %1, %3 \n"
" sync \n"
" .set mips0 \n"
: "=&r" (result), "=&r" (temp), "=m" (v->counter)
: "Ir" (i), "m" (v->counter)
Expand All @@ -202,7 +206,6 @@ static __inline__ int atomic_sub_return(int i, atomic_t * v)
" sc %0, %2 \n"
" beqz %0, 1b \n"
" subu %0, %1, %3 \n"
" sync \n"
" .set mips0 \n"
: "=&r" (result), "=&r" (temp), "=m" (v->counter)
: "Ir" (i), "m" (v->counter)
Expand All @@ -217,6 +220,8 @@ static __inline__ int atomic_sub_return(int i, atomic_t * v)
local_irq_restore(flags);
}

smp_mb();

return result;
}

Expand All @@ -232,6 +237,8 @@ static __inline__ int atomic_sub_if_positive(int i, atomic_t * v)
{
unsigned long result;

smp_mb();

if (cpu_has_llsc && R10000_LLSC_WAR) {
unsigned long temp;

Expand All @@ -245,7 +252,6 @@ static __inline__ int atomic_sub_if_positive(int i, atomic_t * v)
" beqzl %0, 1b \n"
" subu %0, %1, %3 \n"
" .set reorder \n"
" sync \n"
"1: \n"
" .set mips0 \n"
: "=&r" (result), "=&r" (temp), "=m" (v->counter)
Expand All @@ -264,7 +270,6 @@ static __inline__ int atomic_sub_if_positive(int i, atomic_t * v)
" beqz %0, 1b \n"
" subu %0, %1, %3 \n"
" .set reorder \n"
" sync \n"
"1: \n"
" .set mips0 \n"
: "=&r" (result), "=&r" (temp), "=m" (v->counter)
Expand All @@ -281,6 +286,8 @@ static __inline__ int atomic_sub_if_positive(int i, atomic_t * v)
local_irq_restore(flags);
}

smp_mb();

return result;
}

Expand Down Expand Up @@ -484,6 +491,8 @@ static __inline__ long atomic64_add_return(long i, atomic64_t * v)
{
unsigned long result;

smp_mb();

if (cpu_has_llsc && R10000_LLSC_WAR) {
unsigned long temp;

Expand All @@ -494,7 +503,6 @@ static __inline__ long atomic64_add_return(long i, atomic64_t * v)
" scd %0, %2 \n"
" beqzl %0, 1b \n"
" addu %0, %1, %3 \n"
" sync \n"
" .set mips0 \n"
: "=&r" (result), "=&r" (temp), "=m" (v->counter)
: "Ir" (i), "m" (v->counter)
Expand All @@ -509,7 +517,6 @@ static __inline__ long atomic64_add_return(long i, atomic64_t * v)
" scd %0, %2 \n"
" beqz %0, 1b \n"
" addu %0, %1, %3 \n"
" sync \n"
" .set mips0 \n"
: "=&r" (result), "=&r" (temp), "=m" (v->counter)
: "Ir" (i), "m" (v->counter)
Expand All @@ -524,13 +531,17 @@ static __inline__ long atomic64_add_return(long i, atomic64_t * v)
local_irq_restore(flags);
}

smp_mb();

return result;
}

static __inline__ long atomic64_sub_return(long i, atomic64_t * v)
{
unsigned long result;

smp_mb();

if (cpu_has_llsc && R10000_LLSC_WAR) {
unsigned long temp;

Expand All @@ -541,7 +552,6 @@ static __inline__ long atomic64_sub_return(long i, atomic64_t * v)
" scd %0, %2 \n"
" beqzl %0, 1b \n"
" subu %0, %1, %3 \n"
" sync \n"
" .set mips0 \n"
: "=&r" (result), "=&r" (temp), "=m" (v->counter)
: "Ir" (i), "m" (v->counter)
Expand All @@ -556,7 +566,6 @@ static __inline__ long atomic64_sub_return(long i, atomic64_t * v)
" scd %0, %2 \n"
" beqz %0, 1b \n"
" subu %0, %1, %3 \n"
" sync \n"
" .set mips0 \n"
: "=&r" (result), "=&r" (temp), "=m" (v->counter)
: "Ir" (i), "m" (v->counter)
Expand All @@ -571,6 +580,8 @@ static __inline__ long atomic64_sub_return(long i, atomic64_t * v)
local_irq_restore(flags);
}

smp_mb();

return result;
}

Expand All @@ -586,6 +597,8 @@ static __inline__ long atomic64_sub_if_positive(long i, atomic64_t * v)
{
unsigned long result;

smp_mb();

if (cpu_has_llsc && R10000_LLSC_WAR) {
unsigned long temp;

Expand All @@ -599,7 +612,6 @@ static __inline__ long atomic64_sub_if_positive(long i, atomic64_t * v)
" beqzl %0, 1b \n"
" dsubu %0, %1, %3 \n"
" .set reorder \n"
" sync \n"
"1: \n"
" .set mips0 \n"
: "=&r" (result), "=&r" (temp), "=m" (v->counter)
Expand All @@ -618,7 +630,6 @@ static __inline__ long atomic64_sub_if_positive(long i, atomic64_t * v)
" beqz %0, 1b \n"
" dsubu %0, %1, %3 \n"
" .set reorder \n"
" sync \n"
"1: \n"
" .set mips0 \n"
: "=&r" (result), "=&r" (temp), "=m" (v->counter)
Expand All @@ -635,6 +646,8 @@ static __inline__ long atomic64_sub_if_positive(long i, atomic64_t * v)
local_irq_restore(flags);
}

smp_mb();

return result;
}

Expand Down
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