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yaml
---
r: 204201
b: refs/heads/master
c: df2a52a
h: refs/heads/master
i:
  204199: 47efeed
v: v3
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Jing Huang authored and James Bottomley committed Jul 27, 2010
1 parent 6709d34 commit c5db145
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Showing 3 changed files with 29 additions and 1 deletion.
2 changes: 1 addition & 1 deletion [refs]
Original file line number Diff line number Diff line change
@@ -1,2 +1,2 @@
---
refs/heads/master: 9aeb6802ddc06b66fc1a58a882fa54bba37040b3
refs/heads/master: df2a52a6c8c4995e0bec0b739ddb2f51664837dd
25 changes: 25 additions & 0 deletions trunk/drivers/scsi/bfa/bfa_ioc_ct.c
Original file line number Diff line number Diff line change
Expand Up @@ -376,10 +376,35 @@ bfa_ioc_ct_pll_init(struct bfa_ioc_s *ioc)
bfa_reg_write(ioc->ioc_regs.app_pll_fast_ctl_reg, pll_fclk |
__APP_PLL_425_ENABLE);

/**
* PSS memory reset is asserted at power-on-reset. Need to clear
* this before running EDRAM BISTR
*/
if (ioc->cna) {
bfa_reg_write((rb + PMM_1T_RESET_REG_P0), __PMM_1T_RESET_P);
bfa_reg_write((rb + PMM_1T_RESET_REG_P1), __PMM_1T_RESET_P);
}

r32 = bfa_reg_read((rb + PSS_CTL_REG));
r32 &= ~__PSS_LMEM_RESET;
bfa_reg_write((rb + PSS_CTL_REG), r32);
bfa_os_udelay(1000);

if (ioc->cna) {
bfa_reg_write((rb + PMM_1T_RESET_REG_P0), 0);
bfa_reg_write((rb + PMM_1T_RESET_REG_P1), 0);
}

bfa_reg_write((rb + MBIST_CTL_REG), __EDRAM_BISTR_START);
bfa_os_udelay(1000);
r32 = bfa_reg_read((rb + MBIST_STAT_REG));
bfa_trc(ioc, r32);

/**
* Clear BISTR
*/
bfa_reg_write((rb + MBIST_CTL_REG), 0);

/*
* release semaphore.
*/
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3 changes: 3 additions & 0 deletions trunk/drivers/scsi/bfa/include/bfi/bfi_ctreg.h
Original file line number Diff line number Diff line change
Expand Up @@ -455,6 +455,9 @@ enum {
#define __PSS_LPU0_RAM_ERR 0x00000001
#define ERR_SET_REG 0x00018818
#define __PSS_ERR_STATUS_SET 0x003fffff
#define PMM_1T_RESET_REG_P0 0x0002381c
#define __PMM_1T_RESET_P 0x00000001
#define PMM_1T_RESET_REG_P1 0x00023c1c
#define HQM_QSET0_RXQ_DRBL_P0 0x00038000
#define __RXQ0_ADD_VECTORS_P 0x80000000
#define __RXQ0_STOP_P 0x40000000
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