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[PATCH] ppc32: Fix PPC440SP SRAM controller DCRs
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Fixes the incorrect DCR base value for the 440SP SRAM controller.

Signed-off-by: Matt Porter <mporter@kernel.crashing.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
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Matt Porter authored and Linus Torvalds committed Aug 18, 2005
1 parent 28cd1d1 commit c6a3ea2
Showing 1 changed file with 0 additions and 4 deletions.
4 changes: 0 additions & 4 deletions include/asm-ppc/ibm44x.h
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Original file line number Diff line number Diff line change
Expand Up @@ -423,11 +423,7 @@
#define MQ0_CONFIG_SIZE_2G 0x0000c000

/* Internal SRAM Controller 440GX/440SP */
#ifdef CONFIG_440SP
#define DCRN_SRAM0_BASE 0x100
#else /* 440GX */
#define DCRN_SRAM0_BASE 0x000
#endif

#define DCRN_SRAM0_SB0CR (DCRN_SRAM0_BASE + 0x020)
#define DCRN_SRAM0_SB1CR (DCRN_SRAM0_BASE + 0x021)
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