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Merge branch 'zynq/core-smp' of git://git.xilinx.com/linux-xlnx into …
…next/soc2 From Michal Simek <michal.simek@xilinx.com>: This branch is based on zynq/clksrc/cleanup parts because there are some dependencies on moving timer to generic location. I could based it on standard Linux tagged version but you will get several conflicts you will have to resolve. If you are OK to resolving these problems, please let me know I will create another branch with core-smp changes which are not based on zynq/clksrc/cleanup branch. * 'zynq/core-smp' of git://git.xilinx.com/linux-xlnx: arm: zynq: Add hotplug support arm: zynq: Add smp support arm: zynq: Add smp_twd timer arm: zynq: Get rid of xilinx function prefix arm: zynq: Add support for system reset arm: zynq: Move slcr initialization to separate file arm: zynq: Load scu baseaddress at run time Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Documentation/devicetree/bindings/timer/cadence,ttc-timer.txt
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Original file line number | Diff line number | Diff line change |
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@@ -0,0 +1,17 @@ | ||
Cadence TTC - Triple Timer Counter | ||
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||
Required properties: | ||
- compatible : Should be "cdns,ttc". | ||
- reg : Specifies base physical address and size of the registers. | ||
- interrupts : A list of 3 interrupts; one per timer channel. | ||
- clocks: phandle to the source clock | ||
|
||
Example: | ||
|
||
ttc0: ttc0@f8001000 { | ||
interrupt-parent = <&intc>; | ||
interrupts = < 0 10 4 0 11 4 0 12 4 >; | ||
compatible = "cdns,ttc"; | ||
reg = <0xF8001000 0x1000>; | ||
clocks = <&cpu_clk 3>; | ||
}; |
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