---

yaml
---
r: 366255
b: refs/heads/master
c: 4d681be
h: refs/heads/master
i:
  366253: 5589500
  366251: 432d3cb
  366247: 82a9137
  366239: f5a3c79
v: v3

[refs]

@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 357d122670937c35b33d99c46356ef2b63182a1f
+refs/heads/master: 4d681be3c33dd74efffbe2a8f70634f7128602ec

trunk/arch/x86/power/cpu.c

@@ -132,7 +132,10 @@ static void fix_processor_context(void)
 {
 	int cpu = smp_processor_id();
 	struct tss_struct *t = &per_cpu(init_tss, cpu);
-
+#ifdef CONFIG_X86_64
+	struct desc_struct *desc = get_cpu_gdt_table(cpu);
+	tss_desc tss;
+#endif
 	set_tss_desc(cpu, t);	/*
 				 * This just modifies memory; should not be
 				 * necessary. But... This is necessary, because
@@ -141,7 +144,9 @@ static void fix_processor_context(void)
 				 */
 
 #ifdef CONFIG_X86_64
-	get_cpu_gdt_table(cpu)[GDT_ENTRY_TSS].type = 9;
+	memcpy(&tss, &desc[GDT_ENTRY_TSS], sizeof(tss_desc));
+	tss.type = 0x9; /* The available 64-bit TSS (see AMD vol 2, pg 91 */
+	write_gdt_entry(desc, GDT_ENTRY_TSS, &tss, DESC_TSS);
 
 	syscall_init();				/* This sets MSR_*STAR and related */
 #endif