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xtensa: move built-in PIC to drivers/irqchip
Extract xtensa built-in interrupt controller implementation from xtensa/kernel/irq.c and move it to other irqchips, providing way to instantiate it from the device tree. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
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Max Filippov
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Chris Zankel
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Jan 14, 2014
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/* | ||
* Xtensa built-in interrupt controller | ||
* | ||
* Copyright (C) 2002 - 2013 Tensilica, Inc. | ||
* Copyright (C) 1992, 1998 Linus Torvalds, Ingo Molnar | ||
* | ||
* This file is subject to the terms and conditions of the GNU General Public | ||
* License. See the file "COPYING" in the main directory of this archive | ||
* for more details. | ||
* | ||
* Chris Zankel <chris@zankel.net> | ||
* Kevin Chea | ||
*/ | ||
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#include <linux/interrupt.h> | ||
#include <linux/irqdomain.h> | ||
#include <linux/irq.h> | ||
#include <linux/of.h> | ||
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#include "irqchip.h" | ||
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unsigned int cached_irq_mask; | ||
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/* | ||
* Device Tree IRQ specifier translation function which works with one or | ||
* two cell bindings. First cell value maps directly to the hwirq number. | ||
* Second cell if present specifies whether hwirq number is external (1) or | ||
* internal (0). | ||
*/ | ||
static int xtensa_pic_irq_domain_xlate(struct irq_domain *d, | ||
struct device_node *ctrlr, | ||
const u32 *intspec, unsigned int intsize, | ||
unsigned long *out_hwirq, unsigned int *out_type) | ||
{ | ||
return xtensa_irq_domain_xlate(intspec, intsize, | ||
intspec[0], intspec[0], | ||
out_hwirq, out_type); | ||
} | ||
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static const struct irq_domain_ops xtensa_irq_domain_ops = { | ||
.xlate = xtensa_pic_irq_domain_xlate, | ||
.map = xtensa_irq_map, | ||
}; | ||
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static void xtensa_irq_mask(struct irq_data *d) | ||
{ | ||
cached_irq_mask &= ~(1 << d->hwirq); | ||
set_sr(cached_irq_mask, intenable); | ||
} | ||
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static void xtensa_irq_unmask(struct irq_data *d) | ||
{ | ||
cached_irq_mask |= 1 << d->hwirq; | ||
set_sr(cached_irq_mask, intenable); | ||
} | ||
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static void xtensa_irq_enable(struct irq_data *d) | ||
{ | ||
variant_irq_enable(d->hwirq); | ||
xtensa_irq_unmask(d); | ||
} | ||
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static void xtensa_irq_disable(struct irq_data *d) | ||
{ | ||
xtensa_irq_mask(d); | ||
variant_irq_disable(d->hwirq); | ||
} | ||
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static void xtensa_irq_ack(struct irq_data *d) | ||
{ | ||
set_sr(1 << d->hwirq, intclear); | ||
} | ||
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static int xtensa_irq_retrigger(struct irq_data *d) | ||
{ | ||
set_sr(1 << d->hwirq, intset); | ||
return 1; | ||
} | ||
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static struct irq_chip xtensa_irq_chip = { | ||
.name = "xtensa", | ||
.irq_enable = xtensa_irq_enable, | ||
.irq_disable = xtensa_irq_disable, | ||
.irq_mask = xtensa_irq_mask, | ||
.irq_unmask = xtensa_irq_unmask, | ||
.irq_ack = xtensa_irq_ack, | ||
.irq_retrigger = xtensa_irq_retrigger, | ||
}; | ||
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int __init xtensa_pic_init_legacy(struct device_node *interrupt_parent) | ||
{ | ||
struct irq_domain *root_domain = | ||
irq_domain_add_legacy(NULL, NR_IRQS, 0, 0, | ||
&xtensa_irq_domain_ops, &xtensa_irq_chip); | ||
irq_set_default_host(root_domain); | ||
return 0; | ||
} | ||
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static int __init xtensa_pic_init(struct device_node *np, | ||
struct device_node *interrupt_parent) | ||
{ | ||
struct irq_domain *root_domain = | ||
irq_domain_add_linear(np, NR_IRQS, &xtensa_irq_domain_ops, | ||
&xtensa_irq_chip); | ||
irq_set_default_host(root_domain); | ||
return 0; | ||
} | ||
IRQCHIP_DECLARE(xtensa_irq_chip, "cdns,xtensa-pic", xtensa_pic_init); |
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/* | ||
* Xtensa built-in interrupt controller | ||
* | ||
* Copyright (C) 2002 - 2013 Tensilica, Inc. | ||
* Copyright (C) 1992, 1998 Linus Torvalds, Ingo Molnar | ||
* | ||
* This file is subject to the terms and conditions of the GNU General Public | ||
* License. See the file "COPYING" in the main directory of this archive | ||
* for more details. | ||
*/ | ||
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#ifndef __LINUX_IRQCHIP_XTENSA_PIC_H | ||
#define __LINUX_IRQCHIP_XTENSA_PIC_H | ||
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struct device_node; | ||
int xtensa_pic_init_legacy(struct device_node *interrupt_parent); | ||
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#endif /* __LINUX_IRQCHIP_XTENSA_PIC_H */ |