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yaml
---
r: 307443
b: refs/heads/master
c: 6b8a5ee
h: refs/heads/master
i:
  307441: 1a2cf51
  307439: 2959413
v: v3
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Eugeni Dodonov authored and Daniel Vetter committed May 19, 2012
1 parent 926c970 commit cd20341
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Showing 2 changed files with 12 additions and 1 deletion.
2 changes: 1 addition & 1 deletion [refs]
Original file line number Diff line number Diff line change
@@ -1,2 +1,2 @@
---
refs/heads/master: 4abb3c8c713c34499ca2d640a319a8dead95f761
refs/heads/master: 6b8a5eeb9f428becc88adef148518ed07bf06d02
11 changes: 11 additions & 0 deletions trunk/drivers/gpu/drm/i915/intel_pm.c
Original file line number Diff line number Diff line change
Expand Up @@ -3685,6 +3685,17 @@ void intel_init_pm(struct drm_device *dev)
}
dev_priv->display.init_clock_gating = ivybridge_init_clock_gating;
dev_priv->display.sanitize_pm = gen6_sanitize_pm;
} else if (IS_HASWELL(dev)) {
if (SNB_READ_WM0_LATENCY()) {
dev_priv->display.update_wm = sandybridge_update_wm;
dev_priv->display.update_sprite_wm = sandybridge_update_sprite_wm;
} else {
DRM_DEBUG_KMS("Failed to read display plane latency. "
"Disable CxSR\n");
dev_priv->display.update_wm = NULL;
}
dev_priv->display.init_clock_gating = ivybridge_init_clock_gating;
dev_priv->display.sanitize_pm = gen6_sanitize_pm;
} else
dev_priv->display.update_wm = NULL;
} else if (IS_VALLEYVIEW(dev)) {
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