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Vineet Gupta
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Feb 15, 2013
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--- | ||
refs/heads/master: fbd7053a7854b12b0fdc415089c59baabf25c625 | ||
refs/heads/master: 1162b0701b14ba112d4e3fe5c27c694caf983539 |
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/* | ||
* DMA Mapping glue for ARC | ||
* | ||
* Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com) | ||
* | ||
* This program is free software; you can redistribute it and/or modify | ||
* it under the terms of the GNU General Public License version 2 as | ||
* published by the Free Software Foundation. | ||
*/ | ||
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#ifndef ASM_ARC_DMA_MAPPING_H | ||
#define ASM_ARC_DMA_MAPPING_H | ||
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#include <asm-generic/dma-coherent.h> | ||
#include <asm/cacheflush.h> | ||
#include <plat/dma_addr.h> | ||
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void *dma_alloc_noncoherent(struct device *dev, size_t size, | ||
dma_addr_t *dma_handle, gfp_t gfp); | ||
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void dma_free_noncoherent(struct device *dev, size_t size, void *vaddr, | ||
dma_addr_t dma_handle); | ||
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void *dma_alloc_coherent(struct device *dev, size_t size, | ||
dma_addr_t *dma_handle, gfp_t gfp); | ||
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void dma_free_coherent(struct device *dev, size_t size, void *kvaddr, | ||
dma_addr_t dma_handle); | ||
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/* drivers/base/dma-mapping.c */ | ||
extern int dma_common_mmap(struct device *dev, struct vm_area_struct *vma, | ||
void *cpu_addr, dma_addr_t dma_addr, size_t size); | ||
extern int dma_common_get_sgtable(struct device *dev, struct sg_table *sgt, | ||
void *cpu_addr, dma_addr_t dma_addr, | ||
size_t size); | ||
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#define dma_mmap_coherent(d, v, c, h, s) dma_common_mmap(d, v, c, h, s) | ||
#define dma_get_sgtable(d, t, v, h, s) dma_common_get_sgtable(d, t, v, h, s) | ||
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/* | ||
* streaming DMA Mapping API... | ||
* CPU accesses page via normal paddr, thus needs to explicitly made | ||
* consistent before each use | ||
*/ | ||
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static inline void __inline_dma_cache_sync(unsigned long paddr, size_t size, | ||
enum dma_data_direction dir) | ||
{ | ||
switch (dir) { | ||
case DMA_FROM_DEVICE: | ||
dma_cache_inv(paddr, size); | ||
break; | ||
case DMA_TO_DEVICE: | ||
dma_cache_wback(paddr, size); | ||
break; | ||
case DMA_BIDIRECTIONAL: | ||
dma_cache_wback_inv(paddr, size); | ||
break; | ||
default: | ||
pr_err("Invalid DMA dir [%d] for OP @ %lx\n", dir, paddr); | ||
} | ||
} | ||
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void __arc_dma_cache_sync(unsigned long paddr, size_t size, | ||
enum dma_data_direction dir); | ||
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#define _dma_cache_sync(addr, sz, dir) \ | ||
do { \ | ||
if (__builtin_constant_p(dir)) \ | ||
__inline_dma_cache_sync(addr, sz, dir); \ | ||
else \ | ||
__arc_dma_cache_sync(addr, sz, dir); \ | ||
} \ | ||
while (0); | ||
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static inline dma_addr_t | ||
dma_map_single(struct device *dev, void *cpu_addr, size_t size, | ||
enum dma_data_direction dir) | ||
{ | ||
_dma_cache_sync((unsigned long)cpu_addr, size, dir); | ||
return plat_kernel_addr_to_dma(dev, cpu_addr); | ||
} | ||
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static inline void | ||
dma_unmap_single(struct device *dev, dma_addr_t dma_addr, | ||
size_t size, enum dma_data_direction dir) | ||
{ | ||
} | ||
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static inline dma_addr_t | ||
dma_map_page(struct device *dev, struct page *page, | ||
unsigned long offset, size_t size, | ||
enum dma_data_direction dir) | ||
{ | ||
unsigned long paddr = page_to_phys(page) + offset; | ||
return dma_map_single(dev, (void *)paddr, size, dir); | ||
} | ||
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static inline void | ||
dma_unmap_page(struct device *dev, dma_addr_t dma_handle, | ||
size_t size, enum dma_data_direction dir) | ||
{ | ||
} | ||
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static inline int | ||
dma_map_sg(struct device *dev, struct scatterlist *sg, | ||
int nents, enum dma_data_direction dir) | ||
{ | ||
struct scatterlist *s; | ||
int i; | ||
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for_each_sg(sg, s, nents, i) | ||
sg->dma_address = dma_map_page(dev, sg_page(s), s->offset, | ||
s->length, dir); | ||
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return nents; | ||
} | ||
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static inline void | ||
dma_unmap_sg(struct device *dev, struct scatterlist *sg, | ||
int nents, enum dma_data_direction dir) | ||
{ | ||
struct scatterlist *s; | ||
int i; | ||
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for_each_sg(sg, s, nents, i) | ||
dma_unmap_page(dev, sg_dma_address(s), sg_dma_len(s), dir); | ||
} | ||
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static inline void | ||
dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle, | ||
size_t size, enum dma_data_direction dir) | ||
{ | ||
_dma_cache_sync(plat_dma_addr_to_kernel(dev, dma_handle), size, | ||
DMA_FROM_DEVICE); | ||
} | ||
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static inline void | ||
dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle, | ||
size_t size, enum dma_data_direction dir) | ||
{ | ||
_dma_cache_sync(plat_dma_addr_to_kernel(dev, dma_handle), size, | ||
DMA_TO_DEVICE); | ||
} | ||
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static inline void | ||
dma_sync_single_range_for_cpu(struct device *dev, dma_addr_t dma_handle, | ||
unsigned long offset, size_t size, | ||
enum dma_data_direction direction) | ||
{ | ||
_dma_cache_sync(plat_dma_addr_to_kernel(dev, dma_handle) + offset, | ||
size, DMA_FROM_DEVICE); | ||
} | ||
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static inline void | ||
dma_sync_single_range_for_device(struct device *dev, dma_addr_t dma_handle, | ||
unsigned long offset, size_t size, | ||
enum dma_data_direction direction) | ||
{ | ||
_dma_cache_sync(plat_dma_addr_to_kernel(dev, dma_handle) + offset, | ||
size, DMA_TO_DEVICE); | ||
} | ||
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static inline void | ||
dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nelems, | ||
enum dma_data_direction dir) | ||
{ | ||
int i; | ||
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for (i = 0; i < nelems; i++, sg++) | ||
_dma_cache_sync((unsigned int)sg_virt(sg), sg->length, dir); | ||
} | ||
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static inline void | ||
dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nelems, | ||
enum dma_data_direction dir) | ||
{ | ||
int i; | ||
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for (i = 0; i < nelems; i++, sg++) | ||
_dma_cache_sync((unsigned int)sg_virt(sg), sg->length, dir); | ||
} | ||
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static inline int dma_supported(struct device *dev, u64 dma_mask) | ||
{ | ||
/* Support 32 bit DMA mask exclusively */ | ||
return dma_mask == DMA_BIT_MASK(32); | ||
} | ||
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static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr) | ||
{ | ||
return 0; | ||
} | ||
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static inline int dma_set_mask(struct device *dev, u64 dma_mask) | ||
{ | ||
if (!dev->dma_mask || !dma_supported(dev, dma_mask)) | ||
return -EIO; | ||
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*dev->dma_mask = dma_mask; | ||
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return 0; | ||
} | ||
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#endif |
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/* | ||
* Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com) | ||
* | ||
* This program is free software; you can redistribute it and/or modify | ||
* it under the terms of the GNU General Public License version 2 as | ||
* published by the Free Software Foundation. | ||
*/ | ||
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#ifndef ASM_ARC_DMA_H | ||
#define ASM_ARC_DMA_H | ||
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#define MAX_DMA_ADDRESS 0xC0000000 | ||
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#endif |
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/* | ||
* Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com) | ||
* | ||
* This program is free software; you can redistribute it and/or modify | ||
* it under the terms of the GNU General Public License version 2 as | ||
* published by the Free Software Foundation. | ||
*/ | ||
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#ifndef _ASM_ARC_IO_H | ||
#define _ASM_ARC_IO_H | ||
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#include <linux/types.h> | ||
#include <asm/byteorder.h> | ||
#include <asm/page.h> | ||
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#define PCI_IOBASE ((void __iomem *)0) | ||
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extern void __iomem *ioremap(unsigned long physaddr, unsigned long size); | ||
extern void iounmap(const void __iomem *addr); | ||
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#define ioremap_nocache(phy, sz) ioremap(phy, sz) | ||
#define ioremap_wc(phy, sz) ioremap(phy, sz) | ||
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/* Change struct page to physical address */ | ||
#define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT) | ||
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#define __raw_readb __raw_readb | ||
static inline u8 __raw_readb(const volatile void __iomem *addr) | ||
{ | ||
u8 b; | ||
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__asm__ __volatile__( | ||
" ldb%U1 %0, %1 \n" | ||
: "=r" (b) | ||
: "m" (*(volatile u8 __force *)addr) | ||
: "memory"); | ||
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return b; | ||
} | ||
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#define __raw_readw __raw_readw | ||
static inline u16 __raw_readw(const volatile void __iomem *addr) | ||
{ | ||
u16 s; | ||
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__asm__ __volatile__( | ||
" ldw%U1 %0, %1 \n" | ||
: "=r" (s) | ||
: "m" (*(volatile u16 __force *)addr) | ||
: "memory"); | ||
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return s; | ||
} | ||
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#define __raw_readl __raw_readl | ||
static inline u32 __raw_readl(const volatile void __iomem *addr) | ||
{ | ||
u32 w; | ||
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__asm__ __volatile__( | ||
" ld%U1 %0, %1 \n" | ||
: "=r" (w) | ||
: "m" (*(volatile u32 __force *)addr) | ||
: "memory"); | ||
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return w; | ||
} | ||
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#define __raw_writeb __raw_writeb | ||
static inline void __raw_writeb(u8 b, volatile void __iomem *addr) | ||
{ | ||
__asm__ __volatile__( | ||
" stb%U1 %0, %1 \n" | ||
: | ||
: "r" (b), "m" (*(volatile u8 __force *)addr) | ||
: "memory"); | ||
} | ||
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#define __raw_writew __raw_writew | ||
static inline void __raw_writew(u16 s, volatile void __iomem *addr) | ||
{ | ||
__asm__ __volatile__( | ||
" stw%U1 %0, %1 \n" | ||
: | ||
: "r" (s), "m" (*(volatile u16 __force *)addr) | ||
: "memory"); | ||
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} | ||
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#define __raw_writel __raw_writel | ||
static inline void __raw_writel(u32 w, volatile void __iomem *addr) | ||
{ | ||
__asm__ __volatile__( | ||
" st%U1 %0, %1 \n" | ||
: | ||
: "r" (w), "m" (*(volatile u32 __force *)addr) | ||
: "memory"); | ||
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} | ||
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#include <asm-generic/io.h> | ||
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#endif /* _ASM_ARC_IO_H */ |
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