---

yaml
---
r: 46047
b: refs/heads/master
c: 7728098
h: refs/heads/master
i:
  46045: 61fd2d5
  46043: 6646e1c
  46039: 5fe01c8
  46031: 92c44e5
  46015: d681d75
v: v3

[refs]

@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 222335b755726f539c4a056ce119e017aa4166c4
+refs/heads/master: 77280989673ee1ef736a92617f52e2be45651833

trunk/MAINTAINERS

@@ -3593,12 +3593,6 @@ M:	ysato@users.sourceforge.jp
 W:	http://uclinux-h8.sourceforge.jp/
 S:	Supported
 
-UFS FILESYSTEM
-P: Evgeniy Dushistov
-M: dushistov@mail.ru
-L: linux-kernel@vger.kernel.org
-S: Maintained
-
 USB DIAMOND RIO500 DRIVER
 P:	Cesar Miquel
 M:	miquel@df.uba.ar

trunk/arch/i386/kernel/cpu/cyrix.c

@@ -173,7 +173,7 @@ static void __cpuinit geode_configure(void)
 	ccr4 = getCx86(CX86_CCR4);
 	ccr4 |= 0x38;		/* FPU fast, DTE cache, Mem bypass */
 
-	setCx86(CX86_CCR3, ccr3);
+	setCx86(CX86_CCR4, ccr4);
 
 	set_cx86_memwb();
 	set_cx86_reorder();	

trunk/drivers/ata/pata_jmicron.c

@@ -204,20 +204,12 @@ static int jmicron_init_one (struct pci_dev *pdev, const struct pci_device_id *i
 
 	u32 reg;
 
-	if (id->driver_data != 368) {
-		/* Put the controller into AHCI mode in case the AHCI driver
-		   has not yet been loaded. This can be done with either
-		   function present */
+	/* PATA controller is fn 1, AHCI is fn 0 */
+	if (id->driver_data != 368 && PCI_FUNC(pdev->devfn) != 1)
+		return -ENODEV;
 
-		/* FIXME: We may want a way to override this in future */
-		pci_write_config_byte(pdev, 0x41, 0xa1);
-
-		/* PATA controller is fn 1, AHCI is fn 0 */
-		if (PCI_FUNC(pdev->devfn) != 1)
-			return -ENODEV;
-	}
-	if ( id->driver_data == 365 || id->driver_data == 366) {
-		/* The 365/66 have two PATA channels, redirect the second */
+	/* The 365/66 have two PATA channels, redirect the second */
+	if (id->driver_data == 365 || id->driver_data == 366) {
 		pci_read_config_dword(pdev, 0x80, &reg);
 		reg |= (1 << 24);	/* IDE1 to PATA IDE secondary */
 		pci_write_config_dword(pdev, 0x80, reg);

trunk/drivers/net/bnx2.c

@@ -57,8 +57,8 @@
 
 #define DRV_MODULE_NAME		"bnx2"
 #define PFX DRV_MODULE_NAME	": "
-#define DRV_MODULE_VERSION	"1.5.5"
-#define DRV_MODULE_RELDATE	"February 1, 2007"
+#define DRV_MODULE_VERSION	"1.5.4"
+#define DRV_MODULE_RELDATE	"January 24, 2007"
 
 #define RUN_AT(x) (jiffies + (x))
 
@@ -1356,14 +1356,6 @@ bnx2_init_copper_phy(struct bnx2 *bp)
 		bnx2_write_phy(bp, 0x18, 0x0400);
 	}
 
-	if (bp->phy_flags & PHY_DIS_EARLY_DAC_FLAG) {
-		bnx2_write_phy(bp, MII_BNX2_DSP_ADDRESS,
-			       MII_BNX2_DSP_EXPAND_REG | 0x8);
-		bnx2_read_phy(bp, MII_BNX2_DSP_RW_PORT, &val);
-		val &= ~(1 << 8);
-		bnx2_write_phy(bp, MII_BNX2_DSP_RW_PORT, val);
-	}
-
 	if (bp->dev->mtu > 1500) {
 		/* Set extended packet length bit */
 		bnx2_write_phy(bp, 0x18, 0x7);
@@ -5926,8 +5918,6 @@ bnx2_init_board(struct pci_dev *pdev, struct net_device *dev)
 	} else if (CHIP_NUM(bp) == CHIP_NUM_5706 ||
 		   CHIP_NUM(bp) == CHIP_NUM_5708)
 		bp->phy_flags |= PHY_CRC_FIX_FLAG;
-	else if (CHIP_ID(bp) == CHIP_ID_5709_A0)
-		bp->phy_flags |= PHY_DIS_EARLY_DAC_FLAG;
 
 	if ((CHIP_ID(bp) == CHIP_ID_5708_A0) ||
 	    (CHIP_ID(bp) == CHIP_ID_5708_B0) ||

trunk/drivers/net/bnx2.h

@@ -6288,10 +6288,6 @@ struct l2_fhdr {
 
 #define BCM5708S_TX_ACTL3			0x17
 
-#define MII_BNX2_DSP_RW_PORT			0x15
-#define MII_BNX2_DSP_ADDRESS			0x17
-#define MII_BNX2_DSP_EXPAND_REG			 0x0f00
-
 #define MIN_ETHERNET_PACKET_SIZE	60
 #define MAX_ETHERNET_PACKET_SIZE	1514
 #define MAX_ETHERNET_JUMBO_PACKET_SIZE	9014
@@ -6493,7 +6489,6 @@ struct bnx2 {
 #define PHY_INT_MODE_MASK_FLAG		0x300
 #define PHY_INT_MODE_AUTO_POLLING_FLAG	0x100
 #define PHY_INT_MODE_LINK_READY_FLAG	0x200
-#define PHY_DIS_EARLY_DAC_FLAG		0x400
 
 	u32			chip_id;
 	/* chip num:16-31, rev:12-15, metal:4-11, bond_id:0-3 */
@@ -6517,7 +6512,6 @@ struct bnx2 {
 #define CHIP_ID_5708_A0			0x57080000
 #define CHIP_ID_5708_B0			0x57081000
 #define CHIP_ID_5708_B1			0x57081010
-#define CHIP_ID_5709_A0			0x57090000
 
 #define CHIP_BOND_ID(bp)		(((bp)->chip_id) & 0xf)
 

trunk/drivers/net/e100.c

@@ -2718,12 +2718,14 @@ static int e100_suspend(struct pci_dev *pdev, pm_message_t state)
 	struct net_device *netdev = pci_get_drvdata(pdev);
 	struct nic *nic = netdev_priv(netdev);
 
+#ifdef CONFIG_E100_NAPI
 	if (netif_running(netdev))
 		netif_poll_disable(nic->netdev);
+#endif
 	del_timer_sync(&nic->watchdog);
 	netif_carrier_off(nic->netdev);
-	netif_device_detach(netdev);
 
+	netif_device_detach(netdev);
 	pci_save_state(pdev);
 
 	if ((nic->flags & wol_magic) | e100_asf(nic)) {
@@ -2759,13 +2761,16 @@ static int e100_resume(struct pci_dev *pdev)
 }
 #endif /* CONFIG_PM */
 
+
 static void e100_shutdown(struct pci_dev *pdev)
 {
 	struct net_device *netdev = pci_get_drvdata(pdev);
 	struct nic *nic = netdev_priv(netdev);
 
+#ifdef CONFIG_E100_NAPI
 	if (netif_running(netdev))
 		netif_poll_disable(nic->netdev);
+#endif
 	del_timer_sync(&nic->watchdog);
 	netif_carrier_off(nic->netdev);
 

trunk/drivers/net/netxen/netxen_nic.h

@@ -239,39 +239,49 @@ extern unsigned long long netxen_dma_mask;
 
 typedef u32 netxen_ctx_msg;
 
+#define _netxen_set_bits(config_word, start, bits, val)	{\
+	unsigned long long mask = (((1ULL << (bits)) - 1) << (start));	\
+	unsigned long long value = (val);	\
+	(config_word) &= ~mask;	\
+	(config_word) |= (((value) << (start)) & mask); \
+}
+
 #define netxen_set_msg_peg_id(config_word, val)	\
-	((config_word) &= ~3, (config_word) |= val & 3)
+	_netxen_set_bits(config_word, 0, 2, val)
 #define netxen_set_msg_privid(config_word)	\
-	((config_word) |= 1 << 2)
+	set_bit(2, (unsigned long*)&config_word)
 #define netxen_set_msg_count(config_word, val)	\
-	((config_word) &= ~(0x7fff<<3), (config_word) |= (val & 0x7fff) << 3)
+	_netxen_set_bits(config_word, 3, 15, val)
 #define netxen_set_msg_ctxid(config_word, val)	\
-	((config_word) &= ~(0x3ff<<18), (config_word) |= (val & 0x3ff) << 18)
+	_netxen_set_bits(config_word, 18, 10, val)
 #define netxen_set_msg_opcode(config_word, val)	\
-	((config_word) &= ~(0xf<<24), (config_word) |= (val & 0xf) << 24)
+	_netxen_set_bits(config_word, 28, 4, val)
 
 struct netxen_rcv_context {
-	__le64 rcv_ring_addr;
-	__le32 rcv_ring_size;
-	__le32 rsrvd;
+	u32 rcv_ring_addr_lo;
+	u32 rcv_ring_addr_hi;
+	u32 rcv_ring_size;
+	u32 rsrvd;
 };
 
 struct netxen_ring_ctx {
 
 	/* one command ring */
-	__le64 cmd_consumer_offset;
-	__le64 cmd_ring_addr;
-	__le32 cmd_ring_size;
-	__le32 rsrvd;
+	u64 cmd_consumer_offset;
+	u32 cmd_ring_addr_lo;
+	u32 cmd_ring_addr_hi;
+	u32 cmd_ring_size;
+	u32 rsrvd;
 
 	/* three receive rings */
 	struct netxen_rcv_context rcv_ctx[3];
 
 	/* one status ring */
-	__le64 sts_ring_addr;
-	__le32 sts_ring_size;
+	u32 sts_ring_addr_lo;
+	u32 sts_ring_addr_hi;
+	u32 sts_ring_size;
 
-	__le32 ctx_id;
+	u32 ctx_id;
 } __attribute__ ((aligned(64)));
 
 /*
@@ -295,85 +305,81 @@ struct netxen_ring_ctx {
 	((cmd_desc)->port_ctxid |= ((var) & 0x0F))
 
 #define netxen_set_cmd_desc_flags(cmd_desc, val)	\
-	((cmd_desc)->flags_opcode &= ~cpu_to_le16(0x7f), \
-	(cmd_desc)->flags_opcode |= cpu_to_le16((val) & 0x7f))
+	_netxen_set_bits((cmd_desc)->flags_opcode, 0, 7, val)
 #define netxen_set_cmd_desc_opcode(cmd_desc, val)	\
-	((cmd_desc)->flags_opcode &= ~cpu_to_le16(0x3f<<7), \
-	(cmd_desc)->flags_opcode |= cpu_to_le16((val) & (0x3f<<7)))
+	_netxen_set_bits((cmd_desc)->flags_opcode, 7, 6, val)
 
 #define netxen_set_cmd_desc_num_of_buff(cmd_desc, val)	\
-	((cmd_desc)->num_of_buffers_total_length &= ~cpu_to_le32(0xff), \
-	(cmd_desc)->num_of_buffers_total_length |= cpu_to_le32((val) & 0xff))
+	_netxen_set_bits((cmd_desc)->num_of_buffers_total_length, 0, 8, val);
 #define netxen_set_cmd_desc_totallength(cmd_desc, val)	\
-	((cmd_desc)->num_of_buffers_total_length &= cpu_to_le32(0xff), \
-	(cmd_desc)->num_of_buffers_total_length |= cpu_to_le32(val << 24))
+	_netxen_set_bits((cmd_desc)->num_of_buffers_total_length, 8, 24, val);
 
 #define netxen_get_cmd_desc_opcode(cmd_desc)	\
-	((le16_to_cpu((cmd_desc)->flags_opcode) >> 7) & 0x003F)
+	(((cmd_desc)->flags_opcode >> 7) & 0x003F)
 #define netxen_get_cmd_desc_totallength(cmd_desc)	\
-	(le32_to_cpu((cmd_desc)->num_of_buffers_total_length) >> 8)
+	(((cmd_desc)->num_of_buffers_total_length >> 8) & 0x0FFFFFF)
 
 struct cmd_desc_type0 {
 	u8 tcp_hdr_offset;	/* For LSO only */
 	u8 ip_hdr_offset;	/* For LSO only */
 	/* Bit pattern: 0-6 flags, 7-12 opcode, 13-15 unused */
-	__le16 flags_opcode;
+	u16 flags_opcode;
 	/* Bit pattern: 0-7 total number of segments,
 	   8-31 Total size of the packet */
-	__le32 num_of_buffers_total_length;
+	u32 num_of_buffers_total_length;
 	union {
 		struct {
-			__le32 addr_low_part2;
-			__le32 addr_high_part2;
+			u32 addr_low_part2;
+			u32 addr_high_part2;
 		};
-		__le64 addr_buffer2;
+		u64 addr_buffer2;
 	};
 
-	__le16 reference_handle;	/* changed to u16 to add mss */
-	__le16 mss;		/* passed by NDIS_PACKET for LSO */
+	u16 reference_handle;	/* changed to u16 to add mss */
+	u16 mss;		/* passed by NDIS_PACKET for LSO */
 	/* Bit pattern 0-3 port, 0-3 ctx id */
 	u8 port_ctxid;
 	u8 total_hdr_length;	/* LSO only : MAC+IP+TCP Hdr size */
-	__le16 conn_id;		/* IPSec offoad only */
+	u16 conn_id;		/* IPSec offoad only */
 
 	union {
 		struct {
-			__le32 addr_low_part3;
-			__le32 addr_high_part3;
+			u32 addr_low_part3;
+			u32 addr_high_part3;
 		};
-		__le64 addr_buffer3;
+		u64 addr_buffer3;
 	};
 	union {
 		struct {
-			__le32 addr_low_part1;
-			__le32 addr_high_part1;
+			u32 addr_low_part1;
+			u32 addr_high_part1;
 		};
-		__le64 addr_buffer1;
+		u64 addr_buffer1;
 	};
 
-	__le16 buffer1_length;
-	__le16 buffer2_length;
-	__le16 buffer3_length;
-	__le16 buffer4_length;
+	u16 buffer1_length;
+	u16 buffer2_length;
+	u16 buffer3_length;
+	u16 buffer4_length;
 
 	union {
 		struct {
-			__le32 addr_low_part4;
-			__le32 addr_high_part4;
+			u32 addr_low_part4;
+			u32 addr_high_part4;
 		};
-		__le64 addr_buffer4;
+		u64 addr_buffer4;
 	};
 
-	__le64 unused;
+	u64 unused;
 
 } __attribute__ ((aligned(64)));
 
 /* Note: sizeof(rcv_desc) should always be a mutliple of 2 */
 struct rcv_desc {
-	__le16 reference_handle;
-	__le16 reserved;
-	__le32 buffer_length;	/* allocated buffer length (usually 2K) */
-	__le64 addr_buffer;
+	u16 reference_handle;
+	u16 reserved;
+	u32 buffer_length;	/* allocated buffer length (usually 2K) */
+	u64 addr_buffer;
 };
 
 /* opcode field in status_desc */
@@ -399,36 +405,36 @@ struct rcv_desc {
 	(((status_desc)->lro & 0x80) >> 7)
 
 #define netxen_get_sts_port(status_desc)	\
-	(le64_to_cpu((status_desc)->status_desc_data) & 0x0F)
+	((status_desc)->status_desc_data & 0x0F)
 #define netxen_get_sts_status(status_desc)	\
-	((le64_to_cpu((status_desc)->status_desc_data) >> 4) & 0x0F)
+	(((status_desc)->status_desc_data >> 4) & 0x0F)
 #define netxen_get_sts_type(status_desc)	\
-	((le64_to_cpu((status_desc)->status_desc_data) >> 8) & 0x0F)
+	(((status_desc)->status_desc_data >> 8) & 0x0F)
 #define netxen_get_sts_totallength(status_desc)	\
-	((le64_to_cpu((status_desc)->status_desc_data) >> 12) & 0xFFFF)
+	(((status_desc)->status_desc_data >> 12) & 0xFFFF)
 #define netxen_get_sts_refhandle(status_desc)	\
-	((le64_to_cpu((status_desc)->status_desc_data) >> 28) & 0xFFFF)
+	(((status_desc)->status_desc_data >> 28) & 0xFFFF)
 #define netxen_get_sts_prot(status_desc)	\
-	((le64_to_cpu((status_desc)->status_desc_data) >> 44) & 0x0F)
+	(((status_desc)->status_desc_data >> 44) & 0x0F)
 #define netxen_get_sts_owner(status_desc)	\
-	((le64_to_cpu((status_desc)->status_desc_data) >> 56) & 0x03)
+	(((status_desc)->status_desc_data >> 56) & 0x03)
 #define netxen_get_sts_opcode(status_desc)	\
-	((le64_to_cpu((status_desc)->status_desc_data) >> 58) & 0x03F)
+	(((status_desc)->status_desc_data >> 58) & 0x03F)
 
 #define netxen_clear_sts_owner(status_desc)	\
 	((status_desc)->status_desc_data &=	\
-	~cpu_to_le64(((unsigned long long)3) << 56 ))
+	~(((unsigned long long)3) << 56 ))
 #define netxen_set_sts_owner(status_desc, val)	\
 	((status_desc)->status_desc_data |=	\
-	cpu_to_le64(((unsigned long long)((val) & 0x3)) << 56 ))
+	(((unsigned long long)((val) & 0x3)) << 56 ))
 
 struct status_desc {
 	/* Bit pattern: 0-3 port, 4-7 status, 8-11 type, 12-27 total_length
 	   28-43 reference_handle, 44-47 protocol, 48-52 unused
 	   53-55 desc_cnt, 56-57 owner, 58-63 opcode
 	 */
-	__le64 status_desc_data;
-	__le32 hash_value;
+	u64 status_desc_data;
+	u32 hash_value;
 	u8 hash_type;
 	u8 msg_type;
 	u8 unused;
@@ -999,9 +1005,9 @@ void netxen_niu_gbe_set_mii_mode(struct netxen_adapter *adapter, int port,
 void netxen_niu_gbe_set_gmii_mode(struct netxen_adapter *adapter, int port,
 				  long enable);
 int netxen_niu_gbe_phy_read(struct netxen_adapter *adapter, long phy, long reg,
-			    __u32 * readval);
+			    __le32 * readval);
 int netxen_niu_gbe_phy_write(struct netxen_adapter *adapter, long phy,
-			     long reg, __u32 val);
+			     long reg, __le32 val);
 
 /* Functions available from netxen_nic_hw.c */
 int netxen_nic_set_mtu_xgb(struct netxen_port *port, int new_mtu);