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Lennert Buytenhek
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Jeff Garzik
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Nov 18, 2005
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--- | ||
refs/heads/master: 7f7f53168dbee6d6a462acea666fddd18aad4f08 | ||
refs/heads/master: 15d014d13149aedd76cbff1b5c3bbfe839391457 |
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config ENP2611_MSF_NET | ||
tristate "Radisys ENP2611 MSF network interface support" | ||
depends on ARCH_ENP2611 | ||
help | ||
This is a driver for the MSF network interface unit in | ||
the IXP2400 on the Radisys ENP2611 platform. |
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obj-$(CONFIG_ENP2611_MSF_NET) += enp2611_mod.o | ||
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enp2611_mod-objs := caleb.o enp2611.o ixp2400-msf.o ixpdev.o pm3386.o |
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/* | ||
* Helper functions for the SPI-3 bridge FPGA on the Radisys ENP2611 | ||
* Copyright (C) 2004, 2005 Lennert Buytenhek <buytenh@wantstofly.org> | ||
* Dedicated to Marija Kulikova. | ||
* | ||
* This program is free software; you can redistribute it and/or modify | ||
* it under the terms of the GNU General Public License as published by | ||
* the Free Software Foundation; either version 2 of the License, or | ||
* (at your option) any later version. | ||
*/ | ||
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#include <linux/config.h> | ||
#include <linux/module.h> | ||
#include <linux/delay.h> | ||
#include <asm/io.h> | ||
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#define CALEB_IDLO 0x00 | ||
#define CALEB_IDHI 0x01 | ||
#define CALEB_RID 0x02 | ||
#define CALEB_RESET 0x03 | ||
#define CALEB_INTREN0 0x04 | ||
#define CALEB_INTREN1 0x05 | ||
#define CALEB_INTRSTAT0 0x06 | ||
#define CALEB_INTRSTAT1 0x07 | ||
#define CALEB_PORTEN 0x08 | ||
#define CALEB_BURST 0x09 | ||
#define CALEB_PORTPAUS 0x0A | ||
#define CALEB_PORTPAUSD 0x0B | ||
#define CALEB_PHY0RX 0x10 | ||
#define CALEB_PHY1RX 0x11 | ||
#define CALEB_PHY0TX 0x12 | ||
#define CALEB_PHY1TX 0x13 | ||
#define CALEB_IXPRX_HI_CNTR 0x15 | ||
#define CALEB_PHY0RX_HI_CNTR 0x16 | ||
#define CALEB_PHY1RX_HI_CNTR 0x17 | ||
#define CALEB_IXPRX_CNTR 0x18 | ||
#define CALEB_PHY0RX_CNTR 0x19 | ||
#define CALEB_PHY1RX_CNTR 0x1A | ||
#define CALEB_IXPTX_CNTR 0x1B | ||
#define CALEB_PHY0TX_CNTR 0x1C | ||
#define CALEB_PHY1TX_CNTR 0x1D | ||
#define CALEB_DEBUG0 0x1E | ||
#define CALEB_DEBUG1 0x1F | ||
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static u8 caleb_reg_read(int reg) | ||
{ | ||
u8 value; | ||
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value = *((volatile u8 *)(ENP2611_CALEB_VIRT_BASE + reg)); | ||
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// printk(KERN_INFO "caleb_reg_read(%d) = %.2x\n", reg, value); | ||
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return value; | ||
} | ||
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static void caleb_reg_write(int reg, u8 value) | ||
{ | ||
u8 dummy; | ||
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// printk(KERN_INFO "caleb_reg_write(%d, %.2x)\n", reg, value); | ||
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*((volatile u8 *)(ENP2611_CALEB_VIRT_BASE + reg)) = value; | ||
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dummy = *((volatile u8 *)ENP2611_CALEB_VIRT_BASE); | ||
__asm__ __volatile__("mov %0, %0" : "+r" (dummy)); | ||
} | ||
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void caleb_reset(void) | ||
{ | ||
/* | ||
* Perform a chip reset. | ||
*/ | ||
caleb_reg_write(CALEB_RESET, 0x02); | ||
udelay(1); | ||
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/* | ||
* Enable all interrupt sources. This is needed to get | ||
* meaningful results out of the status bits (register 6 | ||
* and 7.) | ||
*/ | ||
caleb_reg_write(CALEB_INTREN0, 0xff); | ||
caleb_reg_write(CALEB_INTREN1, 0x07); | ||
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/* | ||
* Set RX and TX FIFO thresholds to 1.5kb. | ||
*/ | ||
caleb_reg_write(CALEB_PHY0RX, 0x11); | ||
caleb_reg_write(CALEB_PHY1RX, 0x11); | ||
caleb_reg_write(CALEB_PHY0TX, 0x11); | ||
caleb_reg_write(CALEB_PHY1TX, 0x11); | ||
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/* | ||
* Program SPI-3 burst size. | ||
*/ | ||
caleb_reg_write(CALEB_BURST, 0); // 64-byte RBUF mpackets | ||
// caleb_reg_write(CALEB_BURST, 1); // 128-byte RBUF mpackets | ||
// caleb_reg_write(CALEB_BURST, 2); // 256-byte RBUF mpackets | ||
} | ||
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void caleb_enable_rx(int port) | ||
{ | ||
u8 temp; | ||
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temp = caleb_reg_read(CALEB_PORTEN); | ||
temp |= 1 << port; | ||
caleb_reg_write(CALEB_PORTEN, temp); | ||
} | ||
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void caleb_disable_rx(int port) | ||
{ | ||
u8 temp; | ||
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temp = caleb_reg_read(CALEB_PORTEN); | ||
temp &= ~(1 << port); | ||
caleb_reg_write(CALEB_PORTEN, temp); | ||
} | ||
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void caleb_enable_tx(int port) | ||
{ | ||
u8 temp; | ||
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temp = caleb_reg_read(CALEB_PORTEN); | ||
temp |= 1 << (port + 4); | ||
caleb_reg_write(CALEB_PORTEN, temp); | ||
} | ||
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void caleb_disable_tx(int port) | ||
{ | ||
u8 temp; | ||
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temp = caleb_reg_read(CALEB_PORTEN); | ||
temp &= ~(1 << (port + 4)); | ||
caleb_reg_write(CALEB_PORTEN, temp); | ||
} |
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/* | ||
* Helper functions for the SPI-3 bridge FPGA on the Radisys ENP2611 | ||
* Copyright (C) 2004, 2005 Lennert Buytenhek <buytenh@wantstofly.org> | ||
* Dedicated to Marija Kulikova. | ||
* | ||
* This program is free software; you can redistribute it and/or modify | ||
* it under the terms of the GNU General Public License as published by | ||
* the Free Software Foundation; either version 2 of the License, or | ||
* (at your option) any later version. | ||
*/ | ||
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#ifndef __CALEB_H | ||
#define __CALEB_H | ||
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void caleb_reset(void); | ||
void caleb_enable_rx(int port); | ||
void caleb_disable_rx(int port); | ||
void caleb_enable_tx(int port); | ||
void caleb_disable_tx(int port); | ||
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#endif |
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