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yaml --- r: 62490 b: refs/heads/master c: 83e2b5e h: refs/heads/master v: v3
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Andi Kleen
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Linus Torvalds
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Jul 22, 2007
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| Original file line number | Diff line number | Diff line change |
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| @@ -1,2 +1,2 @@ | ||
| --- | ||
| refs/heads/master: b5d009ca6b36632b5f7c0ccdac30301e014ab616 | ||
| refs/heads/master: 83e2b5ef056cba890750436bc9aa37b2c4f58314 |
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -1,42 +1 @@ | ||
| #ifndef ASM_HYPERTRANSPORT_H | ||
| #define ASM_HYPERTRANSPORT_H | ||
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| /* | ||
| * Constants for x86 Hypertransport Interrupts. | ||
| */ | ||
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| #define HT_IRQ_LOW_BASE 0xf8000000 | ||
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| #define HT_IRQ_LOW_VECTOR_SHIFT 16 | ||
| #define HT_IRQ_LOW_VECTOR_MASK 0x00ff0000 | ||
| #define HT_IRQ_LOW_VECTOR(v) (((v) << HT_IRQ_LOW_VECTOR_SHIFT) & HT_IRQ_LOW_VECTOR_MASK) | ||
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| #define HT_IRQ_LOW_DEST_ID_SHIFT 8 | ||
| #define HT_IRQ_LOW_DEST_ID_MASK 0x0000ff00 | ||
| #define HT_IRQ_LOW_DEST_ID(v) (((v) << HT_IRQ_LOW_DEST_ID_SHIFT) & HT_IRQ_LOW_DEST_ID_MASK) | ||
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| #define HT_IRQ_LOW_DM_PHYSICAL 0x0000000 | ||
| #define HT_IRQ_LOW_DM_LOGICAL 0x0000040 | ||
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| #define HT_IRQ_LOW_RQEOI_EDGE 0x0000000 | ||
| #define HT_IRQ_LOW_RQEOI_LEVEL 0x0000020 | ||
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| #define HT_IRQ_LOW_MT_FIXED 0x0000000 | ||
| #define HT_IRQ_LOW_MT_ARBITRATED 0x0000004 | ||
| #define HT_IRQ_LOW_MT_SMI 0x0000008 | ||
| #define HT_IRQ_LOW_MT_NMI 0x000000c | ||
| #define HT_IRQ_LOW_MT_INIT 0x0000010 | ||
| #define HT_IRQ_LOW_MT_STARTUP 0x0000014 | ||
| #define HT_IRQ_LOW_MT_EXTINT 0x0000018 | ||
| #define HT_IRQ_LOW_MT_LINT1 0x000008c | ||
| #define HT_IRQ_LOW_MT_LINT0 0x0000098 | ||
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| #define HT_IRQ_LOW_IRQ_MASKED 0x0000001 | ||
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| #define HT_IRQ_HIGH_DEST_ID_SHIFT 0 | ||
| #define HT_IRQ_HIGH_DEST_ID_MASK 0x00ffffff | ||
| #define HT_IRQ_HIGH_DEST_ID(v) ((((v) >> 8) << HT_IRQ_HIGH_DEST_ID_SHIFT) & HT_IRQ_HIGH_DEST_ID_MASK) | ||
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| #endif /* ASM_HYPERTRANSPORT_H */ | ||
| #include <asm-i386/hypertransport.h> |
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| @@ -1,47 +1 @@ | ||
| #ifndef ASM_MSIDEF_H | ||
| #define ASM_MSIDEF_H | ||
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| /* | ||
| * Constants for Intel APIC based MSI messages. | ||
| */ | ||
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| /* | ||
| * Shifts for MSI data | ||
| */ | ||
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| #define MSI_DATA_VECTOR_SHIFT 0 | ||
| #define MSI_DATA_VECTOR_MASK 0x000000ff | ||
| #define MSI_DATA_VECTOR(v) (((v) << MSI_DATA_VECTOR_SHIFT) & MSI_DATA_VECTOR_MASK) | ||
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| #define MSI_DATA_DELIVERY_MODE_SHIFT 8 | ||
| #define MSI_DATA_DELIVERY_FIXED (0 << MSI_DATA_DELIVERY_MODE_SHIFT) | ||
| #define MSI_DATA_DELIVERY_LOWPRI (1 << MSI_DATA_DELIVERY_MODE_SHIFT) | ||
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| #define MSI_DATA_LEVEL_SHIFT 14 | ||
| #define MSI_DATA_LEVEL_DEASSERT (0 << MSI_DATA_LEVEL_SHIFT) | ||
| #define MSI_DATA_LEVEL_ASSERT (1 << MSI_DATA_LEVEL_SHIFT) | ||
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| #define MSI_DATA_TRIGGER_SHIFT 15 | ||
| #define MSI_DATA_TRIGGER_EDGE (0 << MSI_DATA_TRIGGER_SHIFT) | ||
| #define MSI_DATA_TRIGGER_LEVEL (1 << MSI_DATA_TRIGGER_SHIFT) | ||
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| /* | ||
| * Shift/mask fields for msi address | ||
| */ | ||
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| #define MSI_ADDR_BASE_HI 0 | ||
| #define MSI_ADDR_BASE_LO 0xfee00000 | ||
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| #define MSI_ADDR_DEST_MODE_SHIFT 2 | ||
| #define MSI_ADDR_DEST_MODE_PHYSICAL (0 << MSI_ADDR_DEST_MODE_SHIFT) | ||
| #define MSI_ADDR_DEST_MODE_LOGICAL (1 << MSI_ADDR_DEST_MODE_SHIFT) | ||
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| #define MSI_ADDR_REDIRECTION_SHIFT 3 | ||
| #define MSI_ADDR_REDIRECTION_CPU (0 << MSI_ADDR_REDIRECTION_SHIFT) /* dedicated cpu */ | ||
| #define MSI_ADDR_REDIRECTION_LOWPRI (1 << MSI_ADDR_REDIRECTION_SHIFT) /* lowest priority */ | ||
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| #define MSI_ADDR_DEST_ID_SHIFT 12 | ||
| #define MSI_ADDR_DEST_ID_MASK 0x00ffff0 | ||
| #define MSI_ADDR_DEST_ID(dest) (((dest) << MSI_ADDR_DEST_ID_SHIFT) & MSI_ADDR_DEST_ID_MASK) | ||
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| #endif /* ASM_MSIDEF_H */ | ||
| #include <asm-i386/msidef.h> |