Skip to content

Commit

Permalink
OMAPDSS: DISPC: Revert to older DISPC Smart Standby mechanism for OMAP5
Browse files Browse the repository at this point in the history
DISPC on OMAP5 has a more optimised mechanism of asserting Mstandby to achieve
more power savings when DISPC is configured in Smart Standby mode. This
mechanism leads to underflows when multiple DISPC pipes are enabled.

There is a register field which can let us revert to the older mechanism of
asserting Mstandby. Configure this field to prevent underflows.

Signed-off-by: Archit Taneja <archit@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
  • Loading branch information
Archit Taneja authored and Tomi Valkeinen committed Apr 10, 2013
1 parent c35eeb2 commit d0df9a2
Show file tree
Hide file tree
Showing 2 changed files with 8 additions and 0 deletions.
7 changes: 7 additions & 0 deletions drivers/video/omap2/dss/dispc.c
Original file line number Diff line number Diff line change
Expand Up @@ -87,6 +87,9 @@ struct dispc_features {

/* no DISPC_IRQ_FRAMEDONETV on this SoC */
bool no_framedone_tv:1;

/* revert to the OMAP4 mechanism of DISPC Smart Standby operation */
bool mstandby_workaround:1;
};

#define DISPC_MAX_NR_FIFOS 5
Expand Down Expand Up @@ -3490,6 +3493,9 @@ static void _omap_dispc_initial_config(void)
dispc_configure_burst_sizes();

dispc_ovl_enable_zorder_planes();

if (dispc.feat->mstandby_workaround)
REG_FLD_MOD(DISPC_MSTANDBY_CTRL, 1, 0, 0);
}

static const struct dispc_features omap24xx_dispc_feats __initconst = {
Expand Down Expand Up @@ -3584,6 +3590,7 @@ static const struct dispc_features omap54xx_dispc_feats __initconst = {
.calc_core_clk = calc_core_clk_44xx,
.num_fifos = 5,
.gfx_fifo_workaround = true,
.mstandby_workaround = true,
};

static int __init dispc_init_features(struct platform_device *pdev)
Expand Down
1 change: 1 addition & 0 deletions drivers/video/omap2/dss/dispc.h
Original file line number Diff line number Diff line change
Expand Up @@ -39,6 +39,7 @@
#define DISPC_GLOBAL_BUFFER 0x0800
#define DISPC_CONTROL3 0x0848
#define DISPC_CONFIG3 0x084C
#define DISPC_MSTANDBY_CTRL 0x0858

/* DISPC overlay registers */
#define DISPC_OVL_BA0(n) (DISPC_OVL_BASE(n) + \
Expand Down

0 comments on commit d0df9a2

Please sign in to comment.