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arm: zynq: timer: Align columns
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Aligning the columns in a block of #defines, so that the values
are starting in the same colum on every line.

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Tested-by: Josh Cartwright <josh.cartwright@ni.com>
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Soren Brinkmann authored and Michal Simek committed Jan 28, 2013
1 parent ec5b849 commit d16aaf4
Showing 1 changed file with 3 additions and 3 deletions.
6 changes: 3 additions & 3 deletions arch/arm/mach-zynq/timer.c
Original file line number Diff line number Diff line change
Expand Up @@ -35,9 +35,9 @@
* Timer Register Offset Definitions of Timer 1, Increment base address by 4
* and use same offsets for Timer 2
*/
#define XTTCPS_CLK_CNTRL_OFFSET 0x00 /* Clock Control Reg, RW */
#define XTTCPS_CNT_CNTRL_OFFSET 0x0C /* Counter Control Reg, RW */
#define XTTCPS_COUNT_VAL_OFFSET 0x18 /* Counter Value Reg, RO */
#define XTTCPS_CLK_CNTRL_OFFSET 0x00 /* Clock Control Reg, RW */
#define XTTCPS_CNT_CNTRL_OFFSET 0x0C /* Counter Control Reg, RW */
#define XTTCPS_COUNT_VAL_OFFSET 0x18 /* Counter Value Reg, RO */
#define XTTCPS_INTR_VAL_OFFSET 0x24 /* Interval Count Reg, RW */
#define XTTCPS_ISR_OFFSET 0x54 /* Interrupt Status Reg, RO */
#define XTTCPS_IER_OFFSET 0x60 /* Interrupt Enable Reg, RW */
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