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Konstantin Porotchkin authored and Nicolas Pitre committed May 3, 2011
1 parent beb8683 commit d245288
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2 changes: 1 addition & 1 deletion [refs]
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---
refs/heads/master: ec19628d72cff8f80220b7cedba089074ac6a599
refs/heads/master: 7b769bb3e859b0de65999468dd1660e3364f8994
2 changes: 2 additions & 0 deletions trunk/Documentation/00-INDEX
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Expand Up @@ -328,6 +328,8 @@ sysrq.txt
- info on the magic SysRq key.
telephony/
- directory with info on telephony (e.g. voice over IP) support.
uml/
- directory with information about User Mode Linux.
unicode.txt
- info on the Unicode character/font mapping used in Linux.
unshare.txt
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31 changes: 0 additions & 31 deletions trunk/Documentation/ABI/testing/sysfs-bus-bcma
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34 changes: 17 additions & 17 deletions trunk/Documentation/ABI/testing/sysfs-devices-system-cpu
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Expand Up @@ -183,21 +183,21 @@ Description: Discover and change clock speed of CPUs
to learn how to control the knobs.


What: /sys/devices/system/cpu/cpu*/cache/index3/cache_disable_{0,1}
Date: August 2008
What: /sys/devices/system/cpu/cpu*/cache/index*/cache_disable_X
Date: August 2008
KernelVersion: 2.6.27
Contact: discuss@x86-64.org
Description: Disable L3 cache indices

These files exist in every CPU's cache/index3 directory. Each
cache_disable_{0,1} file corresponds to one disable slot which
can be used to disable a cache index. Reading from these files
on a processor with this functionality will return the currently
disabled index for that node. There is one L3 structure per
node, or per internal node on MCM machines. Writing a valid
index to one of these files will cause the specificed cache
index to be disabled.

All AMD processors with L3 caches provide this functionality.
For details, see BKDGs at
http://developer.amd.com/documentation/guides/Pages/default.aspx
Contact: mark.langsdorf@amd.com
Description: These files exist in every cpu's cache index directories.
There are currently 2 cache_disable_# files in each
directory. Reading from these files on a supported
processor will return that cache disable index value
for that processor and node. Writing to one of these
files will cause the specificed cache index to be disabled.

Currently, only AMD Family 10h Processors support cache index
disable, and only for their L3 caches. See the BIOS and
Kernel Developer's Guide at
http://support.amd.com/us/Embedded_TechDocs/31116-Public-GH-BKDG_3-28_5-28-09.pdf
for formatting information and other details on the
cache index disable.
Users: joachim.deguara@amd.com
18 changes: 9 additions & 9 deletions trunk/Documentation/ABI/testing/sysfs-firmware-dmi
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Expand Up @@ -14,15 +14,14 @@ Description:

DMI is structured as a large table of entries, where
each entry has a common header indicating the type and
length of the entry, as well as a firmware-provided
'handle' that is supposed to be unique amongst all
entries.
length of the entry, as well as 'handle' that is
supposed to be unique amongst all entries.

Some entries are required by the specification, but many
others are optional. In general though, users should
never expect to find a specific entry type on their
system unless they know for certain what their firmware
is doing. Machine to machine experiences will vary.
is doing. Machine to machine will vary.

Multiple entries of the same type are allowed. In order
to handle these duplicate entry types, each entry is
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and the two terminating nul characters.
type : The type of the entry. This value is the same
as found in the directory name. It indicates
how the rest of the entry should be interpreted.
how the rest of the entry should be
interpreted.
instance: The instance ordinal of the entry for the
given type. This value is the same as found
in the parent directory name.
position: The ordinal position (zero-based) of the entry
within the entirety of the DMI entry table.
position: The position of the entry within the entirety
of the entirety.

=== Entry Specialization ===

Some entry types may have other information available in
sysfs. Not all types are specialized.
sysfs.

--- Type 15 - System Event Log ---

This entry allows the firmware to export a log of
events the system has taken. This information is
typically backed by nvram, but the implementation
details are abstracted by this table. This entry's data
details are abstracted by this table. This entries data
is exported in the directory:

/sys/firmware/dmi/entries/15-0/system_event_log
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58 changes: 0 additions & 58 deletions trunk/Documentation/ABI/testing/sysfs-firmware-gsmi
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7 changes: 0 additions & 7 deletions trunk/Documentation/ABI/testing/sysfs-firmware-log
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14 changes: 0 additions & 14 deletions trunk/Documentation/ABI/testing/sysfs-power
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Expand Up @@ -158,17 +158,3 @@ Description:
successful, will make the kernel abort a subsequent transition
to a sleep state if any wakeup events are reported after the
write has returned.

What: /sys/power/reserved_size
Date: May 2011
Contact: Rafael J. Wysocki <rjw@sisk.pl>
Description:
The /sys/power/reserved_size file allows user space to control
the amount of memory reserved for allocations made by device
drivers during the "device freeze" stage of hibernation. It can
be written a string representing a non-negative integer that
will be used as the amount of memory to reserve for allocations
made by device drivers' "freeze" callbacks, in bytes.

Reading from this file will display the current value, which is
set to 1 MB by default.
6 changes: 3 additions & 3 deletions trunk/Documentation/DocBook/device-drivers.tmpl
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Expand Up @@ -96,10 +96,10 @@ X!Iinclude/linux/kobject.h

<chapter id="devdrivers">
<title>Device drivers infrastructure</title>
<sect1><title>The Basic Device Driver-Model Structures </title>
!Iinclude/linux/device.h
</sect1>
<sect1><title>Device Drivers Base</title>
<!--
X!Iinclude/linux/device.h
-->
!Edrivers/base/driver.c
!Edrivers/base/core.c
!Edrivers/base/class.c
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