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yaml
---
r: 96420
b: refs/heads/master
c: a963327
h: refs/heads/master
v: v3
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Sergei Shtylyov authored and Ralf Baechle committed May 12, 2008
1 parent 96ae99c commit d2d928a
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Showing 3 changed files with 57 additions and 67 deletions.
2 changes: 1 addition & 1 deletion [refs]
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---
refs/heads/master: c1dcb14ec2ae3c594ce1c2db953004083f2bd4a0
refs/heads/master: a9633279cf13de15b7002b71a507baf89d0619ca
7 changes: 3 additions & 4 deletions trunk/arch/mips/pci/fixup-au1000.c
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Original file line number Diff line number Diff line change
@@ -1,10 +1,9 @@
/*
* BRIEF MODULE DESCRIPTION
* Board specific pci fixups.
* Board specific PCI fixups.
*
* Copyright 2001-2003 MontaVista Software Inc.
* Author: MontaVista Software, Inc.
* ppopov@mvista.com or source@mvista.com
* Copyright 2001-2003, 2008 MontaVista Software Inc.
* Author: MontaVista Software, Inc. <source@mvista.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
Expand Down
115 changes: 53 additions & 62 deletions trunk/arch/mips/pci/ops-au1000.c
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Original file line number Diff line number Diff line change
@@ -1,10 +1,9 @@
/*
* BRIEF MODULE DESCRIPTION
* Alchemy/AMD Au1x00 PCI support.
* Alchemy/AMD Au1xx0 PCI support.
*
* Copyright 2001-2003, 2007 MontaVista Software Inc.
* Author: MontaVista Software, Inc.
* ppopov@mvista.com or source@mvista.com
* Copyright 2001-2003, 2007-2008 MontaVista Software Inc.
* Author: MontaVista Software, Inc. <source@mvista.com>
*
* Support for all devices (greater than 16) added by David Gathright.
*
Expand All @@ -28,6 +27,7 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/

#include <linux/types.h>
#include <linux/pci.h>
#include <linux/kernel.h>
Expand All @@ -36,17 +36,16 @@

#include <asm/mach-au1x00/au1000.h>

#undef DEBUG
#ifdef DEBUG
#define DBG(x...) printk(x)
#undef DEBUG
#ifdef DEBUG
#define DBG(x...) printk(KERN_DEBUG x)
#else
#define DBG(x...)
#endif

#define PCI_ACCESS_READ 0
#define PCI_ACCESS_WRITE 1


int (*board_pci_idsel)(unsigned int devsel, int assert);

void mod_wired_entry(int entry, unsigned long entrylo0,
Expand Down Expand Up @@ -92,10 +91,9 @@ void __init au1x_pci_cfg_init(void)
}

static int config_access(unsigned char access_type, struct pci_bus *bus,
unsigned int dev_fn, unsigned char where,
u32 * data)
unsigned int dev_fn, unsigned char where, u32 *data)
{
#if defined( CONFIG_SOC_AU1500 ) || defined( CONFIG_SOC_AU1550 )
#if defined(CONFIG_SOC_AU1500) || defined(CONFIG_SOC_AU1550)
unsigned int device = PCI_SLOT(dev_fn);
unsigned int function = PCI_FUNC(dev_fn);
unsigned long offset, status;
Expand All @@ -114,85 +112,82 @@ static int config_access(unsigned char access_type, struct pci_bus *bus,
Au1500_PCI_STATCMD);
au_sync_udelay(1);

/* Allow board vendors to implement their own off-chip idsel.
/*
* Allow board vendors to implement their own off-chip IDSEL.
* If it doesn't succeed, may as well bail out at this point.
*/
if (board_pci_idsel) {
if (board_pci_idsel(device, 1) == 0) {
*data = 0xffffffff;
local_irq_restore(flags);
return -1;
}
if (board_pci_idsel && board_pci_idsel(device, 1) == 0) {
*data = 0xffffffff;
local_irq_restore(flags);
return -1;
}

/* setup the config window */
if (bus->number == 0) {
cfg_base = ((1<<device)<<11);
} else {
cfg_base = 0x80000000 | (bus->number<<16) | (device<<11);
}
/* Setup the config window */
if (bus->number == 0)
cfg_base = (1 << device) << 11;
else
cfg_base = 0x80000000 | (bus->number << 16) | (device << 11);

/* setup the lower bits of the 36 bit address */
offset = (function << 8) | (where & ~0x3);
/* pick up any address that falls below the page mask */
/* Setup the lower bits of the 36-bit address */
offset = (function << 8) | (where & ~0x3);
/* Pick up any address that falls below the page mask */
offset |= cfg_base & ~PAGE_MASK;

/* page boundary */
/* Page boundary */
cfg_base = cfg_base & PAGE_MASK;

/*
* To improve performance, if the current device is the same as
* the last device accessed, we don't touch the TLB.
*/
entryLo0 = (6 << 26) | (cfg_base >> 6) | (2 << 3) | 7;
entryLo1 = (6 << 26) | (cfg_base >> 6) | (0x1000 >> 6) | (2 << 3) | 7;
entryLo0 = (6 << 26) | (cfg_base >> 6) | (2 << 3) | 7;
entryLo1 = (6 << 26) | (cfg_base >> 6) | (0x1000 >> 6) | (2 << 3) | 7;
if ((entryLo0 != last_entryLo0) || (entryLo1 != last_entryLo1)) {
mod_wired_entry(pci_cfg_wired_entry, entryLo0, entryLo1,
(unsigned long)pci_cfg_vm->addr, PM_4K);
last_entryLo0 = entryLo0;
last_entryLo1 = entryLo1;
}

if (access_type == PCI_ACCESS_WRITE) {
if (access_type == PCI_ACCESS_WRITE)
au_writel(*data, (int)(pci_cfg_vm->addr + offset));
} else {
else
*data = au_readl((int)(pci_cfg_vm->addr + offset));
}

au_sync_udelay(2);

DBG("cfg_access %d bus->number %d dev %d at %x *data %x conf %x\n",
access_type, bus->number, device, where, *data, offset);
DBG("cfg_access %d bus->number %u dev %u at %x *data %x conf %lx\n",
access_type, bus->number, device, where, *data, offset);

/* check master abort */
/* Check master abort */
status = au_readl(Au1500_PCI_STATCMD);

if (status & (1<<29)) {
if (status & (1 << 29)) {
*data = 0xffffffff;
error = -1;
DBG("Au1x Master Abort\n");
} else if ((status >> 28) & 0xf) {
DBG("PCI ERR detected: device %d, status %x\n", device, ((status >> 28) & 0xf));
DBG("PCI ERR detected: device %u, status %lx\n",
device, (status >> 28) & 0xf);

/* clear errors */
/* Clear errors */
au_writel(status & 0xf000ffff, Au1500_PCI_STATCMD);

*data = 0xffffffff;
error = -1;
}

/* Take away the idsel.
*/
if (board_pci_idsel) {
/* Take away the IDSEL. */
if (board_pci_idsel)
(void)board_pci_idsel(device, 0);
}

local_irq_restore(flags);
return error;
#endif
}

static int read_config_byte(struct pci_bus *bus, unsigned int devfn,
int where, u8 * val)
int where, u8 *val)
{
u32 data;
int ret;
Expand All @@ -206,9 +201,8 @@ static int read_config_byte(struct pci_bus *bus, unsigned int devfn,
return ret;
}


static int read_config_word(struct pci_bus *bus, unsigned int devfn,
int where, u16 * val)
int where, u16 *val)
{
u32 data;
int ret;
Expand All @@ -221,54 +215,50 @@ static int read_config_word(struct pci_bus *bus, unsigned int devfn,
}

static int read_config_dword(struct pci_bus *bus, unsigned int devfn,
int where, u32 * val)
int where, u32 *val)
{
int ret;

ret = config_access(PCI_ACCESS_READ, bus, devfn, where, val);
return ret;
}

static int
write_config_byte(struct pci_bus *bus, unsigned int devfn, int where,
u8 val)
static int write_config_byte(struct pci_bus *bus, unsigned int devfn,
int where, u8 val)
{
u32 data = 0;

if (config_access(PCI_ACCESS_READ, bus, devfn, where, &data))
return -1;

data = (data & ~(0xff << ((where & 3) << 3))) |
(val << ((where & 3) << 3));
(val << ((where & 3) << 3));

if (config_access(PCI_ACCESS_WRITE, bus, devfn, where, &data))
return -1;

return PCIBIOS_SUCCESSFUL;
}

static int
write_config_word(struct pci_bus *bus, unsigned int devfn, int where,
u16 val)
static int write_config_word(struct pci_bus *bus, unsigned int devfn,
int where, u16 val)
{
u32 data = 0;

if (config_access(PCI_ACCESS_READ, bus, devfn, where, &data))
return -1;

data = (data & ~(0xffff << ((where & 3) << 3))) |
(val << ((where & 3) << 3));
(val << ((where & 3) << 3));

if (config_access(PCI_ACCESS_WRITE, bus, devfn, where, &data))
return -1;


return PCIBIOS_SUCCESSFUL;
}

static int
write_config_dword(struct pci_bus *bus, unsigned int devfn, int where,
u32 val)
static int write_config_dword(struct pci_bus *bus, unsigned int devfn,
int where, u32 val)
{
if (config_access(PCI_ACCESS_WRITE, bus, devfn, where, &val))
return -1;
Expand All @@ -277,18 +267,20 @@ write_config_dword(struct pci_bus *bus, unsigned int devfn, int where,
}

static int config_read(struct pci_bus *bus, unsigned int devfn,
int where, int size, u32 * val)
int where, int size, u32 *val)
{
switch (size) {
case 1: {
u8 _val;
int rc = read_config_byte(bus, devfn, where, &_val);

*val = _val;
return rc;
}
case 2: {
case 2: {
u16 _val;
int rc = read_config_word(bus, devfn, where, &_val);

*val = _val;
return rc;
}
Expand All @@ -310,7 +302,6 @@ static int config_write(struct pci_bus *bus, unsigned int devfn,
}
}


struct pci_ops au1x_pci_ops = {
config_read,
config_write
Expand Down

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