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Ben Dooks
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Russell King
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Jul 22, 2007
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| @@ -1,2 +1,2 @@ | ||
| --- | ||
| refs/heads/master: 3ec20520ddfb654b1e60f51ff5e4769afde51b36 | ||
| refs/heads/master: a14a26aca610bbd09fb62fb9fd5dbf6b41321972 |
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| /* linux/include/asm-arm/plat-s3c/uncompress.h | ||
| * | ||
| * Copyright 2003, 2007 Simtec Electronics | ||
| * http://armlinux.simtec.co.uk/ | ||
| * Ben Dooks <ben@simtec.co.uk> | ||
| * | ||
| * S3C - uncompress code | ||
| * | ||
| * This program is free software; you can redistribute it and/or modify | ||
| * it under the terms of the GNU General Public License version 2 as | ||
| * published by the Free Software Foundation. | ||
| */ | ||
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| #ifndef __ASM_PLAT_UNCOMPRESS_H | ||
| #define __ASM_PLAT_UNCOMPRESS_H | ||
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| typedef unsigned int upf_t; /* cannot include linux/serial_core.h */ | ||
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| /* uart setup */ | ||
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| static unsigned int fifo_mask; | ||
| static unsigned int fifo_max; | ||
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| /* forward declerations */ | ||
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| static void arch_detect_cpu(void); | ||
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| /* defines for UART registers */ | ||
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| #include "asm/plat-s3c/regs-serial.h" | ||
| #include "asm/plat-s3c/regs-watchdog.h" | ||
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| /* working in physical space... */ | ||
| #undef S3C2410_WDOGREG | ||
| #define S3C2410_WDOGREG(x) ((S3C24XX_PA_WATCHDOG + (x))) | ||
|
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| /* how many bytes we allow into the FIFO at a time in FIFO mode */ | ||
| #define FIFO_MAX (14) | ||
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| #define uart_base S3C24XX_PA_UART + (0x4000*CONFIG_S3C_LOWLEVEL_UART_PORT) | ||
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| static __inline__ void | ||
| uart_wr(unsigned int reg, unsigned int val) | ||
| { | ||
| volatile unsigned int *ptr; | ||
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| ptr = (volatile unsigned int *)(reg + uart_base); | ||
| *ptr = val; | ||
| } | ||
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| static __inline__ unsigned int | ||
| uart_rd(unsigned int reg) | ||
| { | ||
| volatile unsigned int *ptr; | ||
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| ptr = (volatile unsigned int *)(reg + uart_base); | ||
| return *ptr; | ||
| } | ||
|
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| /* we can deal with the case the UARTs are being run | ||
| * in FIFO mode, so that we don't hold up our execution | ||
| * waiting for tx to happen... | ||
| */ | ||
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| static void putc(int ch) | ||
| { | ||
| if (uart_rd(S3C2410_UFCON) & S3C2410_UFCON_FIFOMODE) { | ||
| int level; | ||
|
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| while (1) { | ||
| level = uart_rd(S3C2410_UFSTAT); | ||
| level &= fifo_mask; | ||
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| if (level < fifo_max) | ||
| break; | ||
| } | ||
|
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| } else { | ||
| /* not using fifos */ | ||
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| while ((uart_rd(S3C2410_UTRSTAT) & S3C2410_UTRSTAT_TXE) != S3C2410_UTRSTAT_TXE) | ||
| barrier(); | ||
| } | ||
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| /* write byte to transmission register */ | ||
| uart_wr(S3C2410_UTXH, ch); | ||
| } | ||
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| static inline void flush(void) | ||
| { | ||
| } | ||
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| #define __raw_writel(d,ad) do { *((volatile unsigned int *)(ad)) = (d); } while(0) | ||
|
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| /* CONFIG_S3C2410_BOOT_WATCHDOG | ||
| * | ||
| * Simple boot-time watchdog setup, to reboot the system if there is | ||
| * any problem with the boot process | ||
| */ | ||
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| #ifdef CONFIG_S3C2410_BOOT_WATCHDOG | ||
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| #define WDOG_COUNT (0xff00) | ||
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| static inline void arch_decomp_wdog(void) | ||
| { | ||
| __raw_writel(WDOG_COUNT, S3C2410_WTCNT); | ||
| } | ||
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| static void arch_decomp_wdog_start(void) | ||
| { | ||
| __raw_writel(WDOG_COUNT, S3C2410_WTDAT); | ||
| __raw_writel(WDOG_COUNT, S3C2410_WTCNT); | ||
| __raw_writel(S3C2410_WTCON_ENABLE | S3C2410_WTCON_DIV128 | S3C2410_WTCON_RSTEN | S3C2410_WTCON_PRESCALE(0x80), S3C2410_WTCON); | ||
| } | ||
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| #else | ||
| #define arch_decomp_wdog_start() | ||
| #define arch_decomp_wdog() | ||
| #endif | ||
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| #ifdef CONFIG_S3C2410_BOOT_ERROR_RESET | ||
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| static void arch_decomp_error(const char *x) | ||
| { | ||
| putstr("\n\n"); | ||
| putstr(x); | ||
| putstr("\n\n -- System resetting\n"); | ||
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| __raw_writel(0x4000, S3C2410_WTDAT); | ||
| __raw_writel(0x4000, S3C2410_WTCNT); | ||
| __raw_writel(S3C2410_WTCON_ENABLE | S3C2410_WTCON_DIV128 | S3C2410_WTCON_RSTEN | S3C2410_WTCON_PRESCALE(0x40), S3C2410_WTCON); | ||
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| while(1); | ||
| } | ||
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| #define arch_error arch_decomp_error | ||
| #endif | ||
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| static void error(char *err); | ||
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| static void | ||
| arch_decomp_setup(void) | ||
| { | ||
| /* we may need to setup the uart(s) here if we are not running | ||
| * on an BAST... the BAST will have left the uarts configured | ||
| * after calling linux. | ||
| */ | ||
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| arch_detect_cpu(); | ||
| arch_decomp_wdog_start(); | ||
| } | ||
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| #endif /* __ASM_PLAT_UNCOMPRESS_H */ |