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MIPS: BCM47XX: ignore last memory page
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Ignoring the last page when ddr size is 128M. Cached accesses to last
page is causing the processor to prefetch using address above 128M
stepping out of the ddr address space.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Patchwork: http://patchwork.linux-mips.org/patch/4365
Signed-off-by: John Crispin <blogic@openwrt.org>
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Hauke Mehrtens authored and John Crispin committed Nov 9, 2012
1 parent b5b64f2 commit d3dce3d
Showing 1 changed file with 10 additions and 0 deletions.
10 changes: 10 additions & 0 deletions arch/mips/bcm47xx/prom.c
Original file line number Diff line number Diff line change
Expand Up @@ -27,6 +27,7 @@
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/spinlock.h>
#include <linux/smp.h>
#include <asm/bootinfo.h>
#include <asm/fw/cfe/cfe_api.h>
#include <asm/fw/cfe/cfe_error.h>
Expand Down Expand Up @@ -127,6 +128,7 @@ static __init void prom_init_mem(void)
{
unsigned long mem;
unsigned long max;
struct cpuinfo_mips *c = &current_cpu_data;

/* Figure out memory size by finding aliases.
*
Expand Down Expand Up @@ -155,6 +157,14 @@ static __init void prom_init_mem(void)
break;
}

/* Ignoring the last page when ddr size is 128M. Cached
* accesses to last page is causing the processor to prefetch
* using address above 128M stepping out of the ddr address
* space.
*/
if (c->cputype == CPU_74K && (mem == (128 << 20)))
mem -= 0x1000;

add_memory_region(0, mem, BOOT_MEM_RAM);
}

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