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ARM: shmobile: r8a7740: add MERAM work-around
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r8a7740 chip has lasting errata on MERAM buffer, and this patch adds
its work-around on setup-r8a7740.c
It solved CEU/VIO6C/2D-DMAC/VCP1/VPU5F/JPU/DISP memroy access error.

But MERAM driver can't control this issue,
since this work-around requires access to non-MERAM register address.
So, This it will be called as board specific code at this point.

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Tested-by: Simon Horman <horms@verge.net.au>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
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Kuninori Morimoto authored and Rafael J. Wysocki committed Jun 20, 2012
1 parent e2dcd46 commit d49679e
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1 change: 1 addition & 0 deletions arch/arm/mach-shmobile/board-armadillo800eva.c
Original file line number Diff line number Diff line change
Expand Up @@ -587,6 +587,7 @@ static void __init eva_init(void)
eva_clock_init();

r8a7740_pinmux_init();
r8a7740_meram_workaround();

/* SCIFA1 */
gpio_request(GPIO_FN_SCIFA1_RXD, NULL);
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1 change: 1 addition & 0 deletions arch/arm/mach-shmobile/include/mach/common.h
Original file line number Diff line number Diff line change
Expand Up @@ -77,6 +77,7 @@ extern void r8a7779_add_standard_devices(void);
extern void r8a7779_clock_init(void);
extern void r8a7779_pinmux_init(void);
extern void r8a7779_pm_init(void);
extern void r8a7740_meram_workaround(void);

extern unsigned int r8a7779_get_core_count(void);
extern int r8a7779_platform_cpu_kill(unsigned int cpu);
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18 changes: 18 additions & 0 deletions arch/arm/mach-shmobile/setup-r8a7740.c
Original file line number Diff line number Diff line change
Expand Up @@ -324,6 +324,24 @@ static struct platform_device *r8a7740_late_devices[] __initdata = {
&i2c1_device,
};

/*
* r8a7740 chip has lasting errata on MERAM buffer.
* this is work-around for it.
* see
* "Media RAM (MERAM)" on r8a7740 documentation
*/
#define MEBUFCNTR 0xFE950098
void r8a7740_meram_workaround(void)
{
void __iomem *reg;

reg = ioremap_nocache(MEBUFCNTR, 4);
if (reg) {
iowrite32(0x01600164, reg);
iounmap(reg);
}
}

#define ICCR 0x0004
#define ICSTART 0x0070

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