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---
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yaml
---
r: 303308
b: refs/heads/master
c: e5cbeef
h: refs/heads/master
v: v3
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Stephen Warren committed Apr 18, 2012
1 parent bcdff34 commit d562b30
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2 changes: 1 addition & 1 deletion [refs]
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---
refs/heads/master: b7449d95b0cbfb06b9ca9de8c322c470fbc2a873
refs/heads/master: e5cbeef0a4d450787169e29b610455b7d9392b7e
44 changes: 44 additions & 0 deletions trunk/arch/arm/boot/dts/tegra-cardhu.dts
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Expand Up @@ -10,6 +10,50 @@
reg = < 0x80000000 0x40000000 >;
};

pinmux@70000000 {
pinctrl-names = "default";
pinctrl-0 = <&state_default>;

state_default: pinmux {
sdmmc1_clk_pz0 {
nvidia,pins = "sdmmc1_clk_pz0";
nvidia,function = "sdmmc1";
nvidia,pull = <0>;
nvidia,tristate = <0>;
};
sdmmc1_cmd_pz1 {
nvidia,pins = "sdmmc1_cmd_pz1",
"sdmmc1_dat0_py7",
"sdmmc1_dat1_py6",
"sdmmc1_dat2_py5",
"sdmmc1_dat3_py4";
nvidia,function = "sdmmc1";
nvidia,pull = <2>;
nvidia,tristate = <0>;
};
sdmmc4_clk_pcc4 {
nvidia,pins = "sdmmc4_clk_pcc4",
"sdmmc4_rst_n_pcc3";
nvidia,function = "sdmmc4";
nvidia,pull = <0>;
nvidia,tristate = <0>;
};
sdmmc4_dat0_paa0 {
nvidia,pins = "sdmmc4_dat0_paa0",
"sdmmc4_dat1_paa1",
"sdmmc4_dat2_paa2",
"sdmmc4_dat3_paa3",
"sdmmc4_dat4_paa4",
"sdmmc4_dat5_paa5",
"sdmmc4_dat6_paa6",
"sdmmc4_dat7_paa7";
nvidia,function = "sdmmc4";
nvidia,pull = <2>;
nvidia,tristate = <0>;
};
};
};

serial@70006000 {
clock-frequency = < 408000000 >;
};
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