---

yaml --- r: 21530 b: refs/heads/master c: 97c4b6f h: refs/heads/master v: v3
git-mirror · Mar 20, 2006 · d5a7196 · d5a7196
1 parent 76ddd7b
commit d5a7196
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Showing 2 changed files with 2 additions and 14 deletions.
diff --git a/[refs] b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 7a591cfe4efef8a232e4938d44ae6693b319f6d7
+refs/heads/master: 97c4b6f95afadea5846b78ce589d25de2a245c56
diff --git a/trunk/include/asm-sparc64/mmu.h b/trunk/include/asm-sparc64/mmu.h
@@ -6,19 +6,7 @@
 #include <asm/const.h>
 #include <asm/hypervisor.h>
 
-/*
- * For the 8k pagesize kernel, use only 10 hw context bits to optimize some
- * shifts in the fast tlbmiss handlers, instead of all 13 bits (specifically
- * for vpte offset calculation). For other pagesizes, this optimization in
- * the tlbhandlers can not be done; but still, all 13 bits can not be used
- * because the tlb handlers use "andcc" instruction which sign extends 13
- * bit arguments.
- */
-#if PAGE_SHIFT == 13
-#define CTX_NR_BITS		10
-#else
-#define CTX_NR_BITS		12
-#endif
+#define CTX_NR_BITS		13
 
 #define TAG_CONTEXT_BITS	((_AC(1,UL) << CTX_NR_BITS) - _AC(1,UL))