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Revert "ARM: shmobile: sh73a0: Replace modify_scu_cpu_psr with scu_po…
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…wer_mode"

This reverts commit e721295.

The code changes the flags of the wrong cpus - which breaks the whole
bootup of secondary CPUs.

Cc: Bastian Hecht <hechtb@gmail.com>
Signed-off-by: Simon Horman <horms@verge.net.au>
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Simon Horman committed Nov 13, 2012
1 parent 40937f7 commit d5bea23
Showing 1 changed file with 21 additions and 2 deletions.
23 changes: 21 additions & 2 deletions arch/arm/mach-shmobile/smp-sh73a0.c
Original file line number Diff line number Diff line change
Expand Up @@ -41,6 +41,9 @@ static void __iomem *scu_base_addr(void)
return (void __iomem *)0xf0000000;
}

static DEFINE_SPINLOCK(scu_lock);
static unsigned long tmp;

#ifdef CONFIG_HAVE_ARM_TWD
static DEFINE_TWD_LOCAL_TIMER(twd_local_timer, 0xf0000600, 29);
void __init sh73a0_register_twd(void)
Expand All @@ -49,6 +52,20 @@ void __init sh73a0_register_twd(void)
}
#endif

static void modify_scu_cpu_psr(unsigned long set, unsigned long clr)
{
void __iomem *scu_base = scu_base_addr();

spin_lock(&scu_lock);
tmp = __raw_readl(scu_base + 8);
tmp &= ~clr;
tmp |= set;
spin_unlock(&scu_lock);

/* disable cache coherency after releasing the lock */
__raw_writel(tmp, scu_base + 8);
}

static unsigned int __init sh73a0_get_core_count(void)
{
void __iomem *scu_base = scu_base_addr();
Expand All @@ -66,7 +83,7 @@ static int __cpuinit sh73a0_boot_secondary(unsigned int cpu, struct task_struct
cpu = cpu_logical_map(cpu);

/* enable cache coherency */
scu_power_mode(scu_base_addr(), 0);
modify_scu_cpu_psr(0, 3 << (cpu * 8));

if (((__raw_readl(PSTR) >> (4 * cpu)) & 3) == 3)
__raw_writel(1 << cpu, WUPCR); /* wake up */
Expand All @@ -78,14 +95,16 @@ static int __cpuinit sh73a0_boot_secondary(unsigned int cpu, struct task_struct

static void __init sh73a0_smp_prepare_cpus(unsigned int max_cpus)
{
int cpu = cpu_logical_map(0);

scu_enable(scu_base_addr());

/* Map the reset vector (in headsmp.S) */
__raw_writel(0, APARMBAREA); /* 4k */
__raw_writel(__pa(shmobile_secondary_vector), SBAR);

/* enable cache coherency on CPU0 */
scu_power_mode(scu_base_addr(), 0);
modify_scu_cpu_psr(0, 3 << (cpu * 8));
}

static void __init sh73a0_smp_init_cpus(void)
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