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Merge tag 'tegra-for-3.8-cpuidle' of git://git.kernel.org/pub/scm/lin…
…ux/kernel/git/swarren/linux-tegra into next/soc From Stephen Warren: ARM: tegra: cpuidle enhancements A cpuidle state "LP2" is added, which power-gates the CPUs. Support for CPUs 1..n is essentially complete, although support for CPU0 could benefit from future use of coupled-cpuidle or similar techniques. A couple of very minor cleanups to cpuidle were included too. This pull request is based on tegra-for-3.8-soc. * tag 'tegra-for-3.8-cpuidle' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra: ARM: tegra: retain L2 content over CPU suspend/resume ARM: tegra30: cpuidle: add powered-down state for CPU0 ARM: tegra30: flowctrl: add cpu_suspend_exter/exit function ARM: tegra30: clocks: add CPU low-power function into tegra_cpu_car_ops ARM: tegra30: common: enable csite clock ARM: tegra30: cpuidle: add powered-down state for secondary CPUs ARM: tegra: cpuidle: add CPU resume function ARM: tegra: cpuidle: separate cpuidle driver for different chips ARM: tegra: rename the file of "sleep-tXX" to "sleep-tegraXX" ARM: tegra: cpuidle: replace LP3 with ARM_CPUIDLE_WFI_STATE
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/* | ||
* CPU idle driver for Tegra CPUs | ||
* | ||
* Copyright (c) 2010-2012, NVIDIA Corporation. | ||
* Copyright (c) 2011 Google, Inc. | ||
* Author: Colin Cross <ccross@android.com> | ||
* Gary King <gking@nvidia.com> | ||
* | ||
* Rework for 3.3 by Peter De Schrijver <pdeschrijver@nvidia.com> | ||
* | ||
* This program is free software; you can redistribute it and/or modify | ||
* it under the terms of the GNU General Public License as published by | ||
* the Free Software Foundation; either version 2 of the License, or | ||
* (at your option) any later version. | ||
* | ||
* This program is distributed in the hope that it will be useful, but WITHOUT | ||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
* more details. | ||
*/ | ||
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#include <linux/kernel.h> | ||
#include <linux/module.h> | ||
#include <linux/cpuidle.h> | ||
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#include <asm/cpuidle.h> | ||
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static struct cpuidle_driver tegra_idle_driver = { | ||
.name = "tegra_idle", | ||
.owner = THIS_MODULE, | ||
.en_core_tk_irqen = 1, | ||
.state_count = 1, | ||
.states = { | ||
[0] = ARM_CPUIDLE_WFI_STATE_PWR(600), | ||
}, | ||
}; | ||
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static DEFINE_PER_CPU(struct cpuidle_device, tegra_idle_device); | ||
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int __init tegra20_cpuidle_init(void) | ||
{ | ||
int ret; | ||
unsigned int cpu; | ||
struct cpuidle_device *dev; | ||
struct cpuidle_driver *drv = &tegra_idle_driver; | ||
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ret = cpuidle_register_driver(&tegra_idle_driver); | ||
if (ret) { | ||
pr_err("CPUidle driver registration failed\n"); | ||
return ret; | ||
} | ||
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for_each_possible_cpu(cpu) { | ||
dev = &per_cpu(tegra_idle_device, cpu); | ||
dev->cpu = cpu; | ||
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dev->state_count = drv->state_count; | ||
ret = cpuidle_register_device(dev); | ||
if (ret) { | ||
pr_err("CPU%u: CPUidle device registration failed\n", | ||
cpu); | ||
return ret; | ||
} | ||
} | ||
return 0; | ||
} |
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/* | ||
* CPU idle driver for Tegra CPUs | ||
* | ||
* Copyright (c) 2010-2012, NVIDIA Corporation. | ||
* Copyright (c) 2011 Google, Inc. | ||
* Author: Colin Cross <ccross@android.com> | ||
* Gary King <gking@nvidia.com> | ||
* | ||
* Rework for 3.3 by Peter De Schrijver <pdeschrijver@nvidia.com> | ||
* | ||
* This program is free software; you can redistribute it and/or modify | ||
* it under the terms of the GNU General Public License as published by | ||
* the Free Software Foundation; either version 2 of the License, or | ||
* (at your option) any later version. | ||
* | ||
* This program is distributed in the hope that it will be useful, but WITHOUT | ||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
* more details. | ||
*/ | ||
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#include <linux/kernel.h> | ||
#include <linux/module.h> | ||
#include <linux/cpuidle.h> | ||
#include <linux/cpu_pm.h> | ||
#include <linux/clockchips.h> | ||
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#include <asm/cpuidle.h> | ||
#include <asm/proc-fns.h> | ||
#include <asm/suspend.h> | ||
#include <asm/smp_plat.h> | ||
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#include "pm.h" | ||
#include "sleep.h" | ||
#include "tegra_cpu_car.h" | ||
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#ifdef CONFIG_PM_SLEEP | ||
static int tegra30_idle_lp2(struct cpuidle_device *dev, | ||
struct cpuidle_driver *drv, | ||
int index); | ||
#endif | ||
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static struct cpuidle_driver tegra_idle_driver = { | ||
.name = "tegra_idle", | ||
.owner = THIS_MODULE, | ||
.en_core_tk_irqen = 1, | ||
#ifdef CONFIG_PM_SLEEP | ||
.state_count = 2, | ||
#else | ||
.state_count = 1, | ||
#endif | ||
.states = { | ||
[0] = ARM_CPUIDLE_WFI_STATE_PWR(600), | ||
#ifdef CONFIG_PM_SLEEP | ||
[1] = { | ||
.enter = tegra30_idle_lp2, | ||
.exit_latency = 2000, | ||
.target_residency = 2200, | ||
.power_usage = 0, | ||
.flags = CPUIDLE_FLAG_TIME_VALID, | ||
.name = "powered-down", | ||
.desc = "CPU power gated", | ||
}, | ||
#endif | ||
}, | ||
}; | ||
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static DEFINE_PER_CPU(struct cpuidle_device, tegra_idle_device); | ||
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#ifdef CONFIG_PM_SLEEP | ||
static bool tegra30_cpu_cluster_power_down(struct cpuidle_device *dev, | ||
struct cpuidle_driver *drv, | ||
int index) | ||
{ | ||
struct cpuidle_state *state = &drv->states[index]; | ||
u32 cpu_on_time = state->exit_latency; | ||
u32 cpu_off_time = state->target_residency - state->exit_latency; | ||
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/* All CPUs entering LP2 is not working. | ||
* Don't let CPU0 enter LP2 when any secondary CPU is online. | ||
*/ | ||
if (num_online_cpus() > 1 || !tegra_cpu_rail_off_ready()) { | ||
cpu_do_idle(); | ||
return false; | ||
} | ||
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clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ENTER, &dev->cpu); | ||
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tegra_idle_lp2_last(cpu_on_time, cpu_off_time); | ||
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clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT, &dev->cpu); | ||
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return true; | ||
} | ||
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#ifdef CONFIG_SMP | ||
static bool tegra30_cpu_core_power_down(struct cpuidle_device *dev, | ||
struct cpuidle_driver *drv, | ||
int index) | ||
{ | ||
clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ENTER, &dev->cpu); | ||
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smp_wmb(); | ||
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save_cpu_arch_register(); | ||
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cpu_suspend(0, tegra30_sleep_cpu_secondary_finish); | ||
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restore_cpu_arch_register(); | ||
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clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT, &dev->cpu); | ||
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return true; | ||
} | ||
#else | ||
static inline bool tegra30_cpu_core_power_down(struct cpuidle_device *dev, | ||
struct cpuidle_driver *drv, | ||
int index) | ||
{ | ||
return true; | ||
} | ||
#endif | ||
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static int __cpuinit tegra30_idle_lp2(struct cpuidle_device *dev, | ||
struct cpuidle_driver *drv, | ||
int index) | ||
{ | ||
u32 cpu = is_smp() ? cpu_logical_map(dev->cpu) : dev->cpu; | ||
bool entered_lp2 = false; | ||
bool last_cpu; | ||
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local_fiq_disable(); | ||
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last_cpu = tegra_set_cpu_in_lp2(cpu); | ||
cpu_pm_enter(); | ||
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if (cpu == 0) { | ||
if (last_cpu) | ||
entered_lp2 = tegra30_cpu_cluster_power_down(dev, drv, | ||
index); | ||
else | ||
cpu_do_idle(); | ||
} else { | ||
entered_lp2 = tegra30_cpu_core_power_down(dev, drv, index); | ||
} | ||
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cpu_pm_exit(); | ||
tegra_clear_cpu_in_lp2(cpu); | ||
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local_fiq_enable(); | ||
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smp_rmb(); | ||
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return (entered_lp2) ? index : 0; | ||
} | ||
#endif | ||
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int __init tegra30_cpuidle_init(void) | ||
{ | ||
int ret; | ||
unsigned int cpu; | ||
struct cpuidle_device *dev; | ||
struct cpuidle_driver *drv = &tegra_idle_driver; | ||
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#ifdef CONFIG_PM_SLEEP | ||
tegra_tear_down_cpu = tegra30_tear_down_cpu; | ||
#endif | ||
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ret = cpuidle_register_driver(&tegra_idle_driver); | ||
if (ret) { | ||
pr_err("CPUidle driver registration failed\n"); | ||
return ret; | ||
} | ||
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for_each_possible_cpu(cpu) { | ||
dev = &per_cpu(tegra_idle_device, cpu); | ||
dev->cpu = cpu; | ||
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dev->state_count = drv->state_count; | ||
ret = cpuidle_register_device(dev); | ||
if (ret) { | ||
pr_err("CPU%u: CPUidle device registration failed\n", | ||
cpu); | ||
return ret; | ||
} | ||
} | ||
return 0; | ||
} |
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