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r8169: enable internal ASPM and clock request settings
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The following chips need to enable internal settings to let ASPM
and clock request work.

RTL8111E-VL, RTL8111F, RTL8411, RTL8111G
RTL8105, RTL8402, RTL8106

Signed-off-by: Hayes Wang <hayeswang@realtek.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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hayeswang authored and David S. Miller committed Nov 4, 2012
1 parent 0cb2bbb commit d64ec84
Showing 1 changed file with 21 additions and 9 deletions.
30 changes: 21 additions & 9 deletions drivers/net/ethernet/realtek/r8169.c
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Original file line number Diff line number Diff line change
Expand Up @@ -455,6 +455,7 @@ enum rtl8168_registers {
#define PWM_EN (1 << 22)
#define RXDV_GATED_EN (1 << 19)
#define EARLY_TALLY_EN (1 << 16)
#define FORCE_CLK (1 << 15) /* force clock request */
};

enum rtl_register_content {
Expand Down Expand Up @@ -518,6 +519,7 @@ enum rtl_register_content {
PMEnable = (1 << 0), /* Power Management Enable */

/* Config2 register p. 25 */
ClkReqEn = (1 << 7), /* Clock Request Enable */
MSIEnable = (1 << 5), /* 8169 only. Reserved in the 8168. */
PCI_Clock_66MHz = 0x01,
PCI_Clock_33MHz = 0x00,
Expand All @@ -538,6 +540,7 @@ enum rtl_register_content {
Spi_en = (1 << 3),
LanWake = (1 << 1), /* LanWake enable/disable */
PMEStatus = (1 << 0), /* PME status can be reset by PCI RST# */
ASPM_en = (1 << 0), /* ASPM enable */

/* TBICSR p.28 */
TBIReset = 0x80000000,
Expand Down Expand Up @@ -5045,8 +5048,6 @@ static void rtl_hw_start_8168e_2(struct rtl8169_private *tp)

RTL_W8(MaxTxPacketSize, EarlySize);

rtl_disable_clock_request(pdev);

RTL_W32(TxConfig, RTL_R32(TxConfig) | TXCFG_AUTO_FIFO);
RTL_W8(MCU, RTL_R8(MCU) & ~NOW_IS_OOB);

Expand All @@ -5055,7 +5056,8 @@ static void rtl_hw_start_8168e_2(struct rtl8169_private *tp)

RTL_W8(DLLPR, RTL_R8(DLLPR) | PFM_EN);
RTL_W32(MISC, RTL_R32(MISC) | PWM_EN);
RTL_W8(Config5, RTL_R8(Config5) & ~Spi_en);
RTL_W8(Config5, (RTL_R8(Config5) & ~Spi_en) | ASPM_en);
RTL_W8(Config2, RTL_R8(Config2) | ClkReqEn);
}

static void rtl_hw_start_8168f(struct rtl8169_private *tp)
Expand All @@ -5080,13 +5082,12 @@ static void rtl_hw_start_8168f(struct rtl8169_private *tp)

RTL_W8(MaxTxPacketSize, EarlySize);

rtl_disable_clock_request(pdev);

RTL_W32(TxConfig, RTL_R32(TxConfig) | TXCFG_AUTO_FIFO);
RTL_W8(MCU, RTL_R8(MCU) & ~NOW_IS_OOB);
RTL_W8(DLLPR, RTL_R8(DLLPR) | PFM_EN);
RTL_W32(MISC, RTL_R32(MISC) | PWM_EN);
RTL_W8(Config5, RTL_R8(Config5) & ~Spi_en);
RTL_W32(MISC, RTL_R32(MISC) | PWM_EN | FORCE_CLK);
RTL_W8(Config5, (RTL_R8(Config5) & ~Spi_en) | ASPM_en);
RTL_W8(Config2, RTL_R8(Config2) | ClkReqEn);
}

static void rtl_hw_start_8168f_1(struct rtl8169_private *tp)
Expand Down Expand Up @@ -5143,8 +5144,10 @@ static void rtl_hw_start_8168g_1(struct rtl8169_private *tp)
rtl_w1w0_eri(tp, 0xdc, ERIAR_MASK_0001, 0x01, 0x00, ERIAR_EXGMAC);

RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb);
RTL_W32(MISC, RTL_R32(MISC) & ~RXDV_GATED_EN);
RTL_W32(MISC, (RTL_R32(MISC) | FORCE_CLK) & ~RXDV_GATED_EN);
RTL_W8(MaxTxPacketSize, EarlySize);
RTL_W8(Config5, RTL_R8(Config5) | ASPM_en);
RTL_W8(Config2, RTL_R8(Config2) | ClkReqEn);

rtl_eri_write(tp, 0xc0, ERIAR_MASK_0011, 0x0000, ERIAR_EXGMAC);
rtl_eri_write(tp, 0xb8, ERIAR_MASK_0011, 0x0000, ERIAR_EXGMAC);
Expand Down Expand Up @@ -5360,6 +5363,9 @@ static void rtl_hw_start_8105e_1(struct rtl8169_private *tp)

RTL_W8(MCU, RTL_R8(MCU) | EN_NDP | EN_OOB_RESET);
RTL_W8(DLLPR, RTL_R8(DLLPR) | PFM_EN);
RTL_W8(Config5, RTL_R8(Config5) | ASPM_en);
RTL_W8(Config2, RTL_R8(Config2) | ClkReqEn);
RTL_W32(MISC, RTL_R32(MISC) | FORCE_CLK);

rtl_ephy_init(tp, e_info_8105e_1, ARRAY_SIZE(e_info_8105e_1));
}
Expand All @@ -5385,6 +5391,9 @@ static void rtl_hw_start_8402(struct rtl8169_private *tp)

RTL_W32(TxConfig, RTL_R32(TxConfig) | TXCFG_AUTO_FIFO);
RTL_W8(MCU, RTL_R8(MCU) & ~NOW_IS_OOB);
RTL_W8(Config5, RTL_R8(Config5) | ASPM_en);
RTL_W8(Config2, RTL_R8(Config2) | ClkReqEn);
RTL_W32(MISC, RTL_R32(MISC) | FORCE_CLK);

rtl_ephy_init(tp, e_info_8402, ARRAY_SIZE(e_info_8402));

Expand All @@ -5406,7 +5415,10 @@ static void rtl_hw_start_8106(struct rtl8169_private *tp)
/* Force LAN exit from ASPM if Rx/Tx are not idle */
RTL_W32(FuncEvent, RTL_R32(FuncEvent) | 0x002800);

RTL_W32(MISC, (RTL_R32(MISC) | DISABLE_LAN_EN) & ~EARLY_TALLY_EN);
RTL_W32(MISC,
(RTL_R32(MISC) | DISABLE_LAN_EN | FORCE_CLK) & ~EARLY_TALLY_EN);
RTL_W8(Config5, RTL_R8(Config5) | ASPM_en);
RTL_W8(Config2, RTL_R8(Config2) | ClkReqEn);
RTL_W8(MCU, RTL_R8(MCU) | EN_NDP | EN_OOB_RESET);
RTL_W8(DLLPR, RTL_R8(DLLPR) & ~PFM_EN);
}
Expand Down

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