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drm/msm/mdp5: dpms(OFF) cleanups
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When disabling the interface (INTF), the change doesn't latch until next
vblank, so we need to wait for vblank.

Also, to be pedantic, in the crtc, set all the mixer stages to unused.
It shouldn't really matter, since at this point we have already disabled
the INTF and waited for necessary vblank.

Signed-off-by: Rob Clark <robdclark@gmail.com>
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Rob Clark committed Nov 21, 2014
1 parent ed85196 commit d6ac4a8
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Showing 2 changed files with 13 additions and 0 deletions.
2 changes: 2 additions & 0 deletions drivers/gpu/drm/msm/mdp/mdp5/mdp5_crtc.c
Original file line number Diff line number Diff line change
Expand Up @@ -150,6 +150,8 @@ static void mdp5_crtc_dpms(struct drm_crtc *crtc, int mode)
mdp5_enable(mdp5_kms);
mdp_irq_register(&mdp5_kms->base, &mdp5_crtc->err);
} else {
/* set STAGE_UNUSED for all layers */
mdp5_ctl_blend(mdp5_crtc->ctl, mdp5_crtc->lm, 0x00000000);
mdp_irq_unregister(&mdp5_kms->base, &mdp5_crtc->err);
mdp5_disable(mdp5_kms);
}
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11 changes: 11 additions & 0 deletions drivers/gpu/drm/msm/mdp/mdp5/mdp5_encoder.c
Original file line number Diff line number Diff line change
Expand Up @@ -132,6 +132,17 @@ static void mdp5_encoder_dpms(struct drm_encoder *encoder, int mode)
spin_lock_irqsave(&mdp5_encoder->intf_lock, flags);
mdp5_write(mdp5_kms, REG_MDP5_INTF_TIMING_ENGINE_EN(intf), 0);
spin_unlock_irqrestore(&mdp5_encoder->intf_lock, flags);

/*
* Wait for a vsync so we know the ENABLE=0 latched before
* the (connector) source of the vsync's gets disabled,
* otherwise we end up in a funny state if we re-enable
* before the disable latches, which results that some of
* the settings changes for the new modeset (like new
* scanout buffer) don't latch properly..
*/
mdp_irq_wait(&mdp5_kms->base, intf2vblank(intf));

bs_set(mdp5_encoder, 0);
}

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