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clk: vt8500: Fix "fix device clock divisor calculations"
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Patch 7248001 "Fix device clock divisor calculations" was apparently
rebased incorrectly before it got upstream, causing a build error.

Replacing the "prate" pointer with the local parent_rate is most
likely the correct solution.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Cc: Tony Prisk <linux@prisktech.co.nz>
Cc: Mike Turquette <mturquette@linaro.org>
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Arnd Bergmann committed Mar 14, 2013
1 parent 7b59496 commit d6d1053
Showing 1 changed file with 1 addition and 1 deletion.
2 changes: 1 addition & 1 deletion drivers/clk/clk-vt8500.c
Original file line number Diff line number Diff line change
Expand Up @@ -157,7 +157,7 @@ static int vt8500_dclk_set_rate(struct clk_hw *hw, unsigned long rate,
divisor = parent_rate / rate;

/* If prate / rate would be decimal, incr the divisor */
if (rate * divisor < *prate)
if (rate * divisor < parent_rate)
divisor++;

if (divisor == cdev->div_mask + 1)
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