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Hema Kalliguddi
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Felipe Balbi
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Nov 22, 2010
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--- | ||
refs/heads/master: 8244272341f00cab845cabc445dbd3665fc01f87 | ||
refs/heads/master: 92d2711f5dc15bf956546923a5718e74853f9912 |
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Clock framework on SuperH architecture | ||
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The framework on SH extends existing API by the function clk_set_rate_ex, | ||
which prototype is as follows: | ||
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clk_set_rate_ex (struct clk *clk, unsigned long rate, int algo_id) | ||
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The algo_id parameter is used to specify algorithm used to recalculate clocks, | ||
adjanced to clock, specified as first argument. It is assumed that algo_id==0 | ||
means no changes to adjanced clock | ||
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Internally, the clk_set_rate_ex forwards request to clk->ops->set_rate method, | ||
if it is present in ops structure. The method should set the clock rate and adjust | ||
all needed clocks according to the passed algo_id. | ||
Exact values for algo_id are machine-dependent. For the sh7722, the following | ||
values are defined: | ||
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NO_CHANGE = 0, | ||
IUS_N1_N1, /* I:U = N:1, U:Sh = N:1 */ | ||
IUS_322, /* I:U:Sh = 3:2:2 */ | ||
IUS_522, /* I:U:Sh = 5:2:2 */ | ||
IUS_N11, /* I:U:Sh = N:1:1 */ | ||
SB_N1, /* Sh:B = N:1 */ | ||
SB3_N1, /* Sh:B3 = N:1 */ | ||
SB3_32, /* Sh:B3 = 3:2 */ | ||
SB3_43, /* Sh:B3 = 4:3 */ | ||
SB3_54, /* Sh:B3 = 5:4 */ | ||
BP_N1, /* B:P = N:1 */ | ||
IP_N1 /* I:P = N:1 */ | ||
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Each of these constants means relation between clocks that can be set via the FRQCR | ||
register |
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*/ | ||
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#define VMALLOC_END 0xf0000000UL | ||
#define VMALLOC_END 0xf0000000 |
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