Skip to content

Commit

Permalink
ath9k: add initial hardware support for ar9271
Browse files Browse the repository at this point in the history 
We will finalize this after some driver core changes, for now
we leave this unsupported.

Cc: Stephen Chen <stephen.chen@atheros.com>
Cc: Zhifeng Cai <zhifeng.cai@atheros.com>
Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
  • Loading branch information
Luis R. Rodriguez authored and John W. Linville committed Aug 4, 2009
1 parent 670388c commit d7e7d22
Show file tree
Hide file tree
Showing 4 changed files with 314 additions and 40 deletions.
106 changes: 105 additions & 1 deletion drivers/net/wireless/ath/ath9k/calib.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -753,6 +753,98 @@ static void ath9k_olc_temp_compensation(struct ath_hw *ah)
}
}

static void ath9k_hw_9271_pa_cal(struct ath_hw *ah)
{
u32 regVal;
unsigned int i;
u32 regList [][2] = {
{ 0x786c, 0 },
{ 0x7854, 0 },
{ 0x7820, 0 },
{ 0x7824, 0 },
{ 0x7868, 0 },
{ 0x783c, 0 },
{ 0x7838, 0 } ,
{ 0x7828, 0 } ,
};

for (i = 0; i < ARRAY_SIZE(regList); i++)
regList[i][1] = REG_READ(ah, regList[i][0]);

regVal = REG_READ(ah, 0x7834);
regVal &= (~(0x1));
REG_WRITE(ah, 0x7834, regVal);
regVal = REG_READ(ah, 0x9808);
regVal |= (0x1 << 27);
REG_WRITE(ah, 0x9808, regVal);

/* 786c,b23,1, pwddac=1 */
REG_RMW_FIELD(ah, AR9285_AN_TOP3, AR9285_AN_TOP3_PWDDAC, 1);
/* 7854, b5,1, pdrxtxbb=1 */
REG_RMW_FIELD(ah, AR9285_AN_RXTXBB1, AR9285_AN_RXTXBB1_PDRXTXBB1, 1);
/* 7854, b7,1, pdv2i=1 */
REG_RMW_FIELD(ah, AR9285_AN_RXTXBB1, AR9285_AN_RXTXBB1_PDV2I, 1);
/* 7854, b8,1, pddacinterface=1 */
REG_RMW_FIELD(ah, AR9285_AN_RXTXBB1, AR9285_AN_RXTXBB1_PDDACIF, 1);
/* 7824,b12,0, offcal=0 */
REG_RMW_FIELD(ah, AR9285_AN_RF2G2, AR9285_AN_RF2G2_OFFCAL, 0);
/* 7838, b1,0, pwddb=0 */
REG_RMW_FIELD(ah, AR9285_AN_RF2G7, AR9285_AN_RF2G7_PWDDB, 0);
/* 7820,b11,0, enpacal=0 */
REG_RMW_FIELD(ah, AR9285_AN_RF2G1, AR9285_AN_RF2G1_ENPACAL, 0);
/* 7820,b25,1, pdpadrv1=0 */
REG_RMW_FIELD(ah, AR9285_AN_RF2G1, AR9285_AN_RF2G1_PDPADRV1, 0);
/* 7820,b24,0, pdpadrv2=0 */
REG_RMW_FIELD(ah, AR9285_AN_RF2G1,AR9285_AN_RF2G1_PDPADRV2,0);
/* 7820,b23,0, pdpaout=0 */
REG_RMW_FIELD(ah, AR9285_AN_RF2G1, AR9285_AN_RF2G1_PDPAOUT, 0);
/* 783c,b14-16,7, padrvgn2tab_0=7 */
REG_RMW_FIELD(ah, AR9285_AN_RF2G8,AR9285_AN_RF2G8_PADRVGN2TAB0, 7);
/*
* 7838,b29-31,0, padrvgn1tab_0=0
* does not matter since we turn it off
*/
REG_RMW_FIELD(ah, AR9285_AN_RF2G7,AR9285_AN_RF2G7_PADRVGN2TAB0, 0);

REG_RMW_FIELD(ah, AR9285_AN_RF2G3, AR9271_AN_RF2G3_CCOMP, 0xfff);

/* Set:
* localmode=1,bmode=1,bmoderxtx=1,synthon=1,
* txon=1,paon=1,oscon=1,synthon_force=1
*/
REG_WRITE(ah, AR9285_AN_TOP2, 0xca0358a0);
udelay(30);
REG_RMW_FIELD(ah, AR9285_AN_RF2G6, AR9271_AN_RF2G6_OFFS, 0);

/* find off_6_1; */
for (i = 6; i >= 0; i--) {
regVal = REG_READ(ah, 0x7834);
regVal |= (1 << (20 + i));
REG_WRITE(ah, 0x7834, regVal);
udelay(1);
//regVal = REG_READ(ah, 0x7834);
regVal &= (~(0x1 << (20 + i)));
regVal |= (MS(REG_READ(ah, 0x7840), AR9285_AN_RXTXBB1_SPARE9)
<< (20 + i));
REG_WRITE(ah, 0x7834, regVal);
}

/* Empirical offset correction */
#if 0
REG_RMW_FIELD(ah, AR9285_AN_RF2G6, AR9271_AN_RF2G6_OFFS, 0x20);
#endif

regVal = REG_READ(ah, 0x7834);
regVal |= 0x1;
REG_WRITE(ah, 0x7834, regVal);
regVal = REG_READ(ah, 0x9808);
regVal &= (~(0x1 << 27));
REG_WRITE(ah, 0x9808, regVal);

for (i = 0; i < ARRAY_SIZE(regList); i++)
REG_WRITE(ah, regList[i][0], regList[i][1]);
}

static inline void ath9k_hw_9285_pa_cal(struct ath_hw *ah)
{

Expand Down Expand Up @@ -869,14 +961,26 @@ bool ath9k_hw_calibrate(struct ath_hw *ah, struct ath9k_channel *chan,
}
}

/* Do NF cal only at longer intervals */
if (longcal) {
if (AR_SREV_9285_11_OR_LATER(ah))
/* Do periodic PAOffset Cal */
if (AR_SREV_9271(ah))
ath9k_hw_9271_pa_cal(ah);
else if (AR_SREV_9285_11_OR_LATER(ah))
ath9k_hw_9285_pa_cal(ah);

if (OLC_FOR_AR9280_20_LATER || OLC_FOR_AR9287_10_LATER)
ath9k_olc_temp_compensation(ah);

/* Get the value from the previous NF cal and update history buffer */
ath9k_hw_getnf(ah, chan);

/*
* Load the NF from history buffer of the current channel.
* NF is slow time-variant, so it is OK to use a historical value.
*/
ath9k_hw_loadnf(ah, ah->curchan);

ath9k_hw_start_nfcal(ah);
}

Expand Down
142 changes: 109 additions & 33 deletions drivers/net/wireless/ath/ath9k/eeprom.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -1237,6 +1237,10 @@ static void ath9k_hw_4k_set_gain(struct ath_hw *ah,
REG_WRITE(ah, AR9285_AN_TOP4, (AR9285_AN_TOP4_DEFAULT | 0x14));
}

/*
* Read EEPROM header info and program the device for correct operation
* given the channel value.
*/
static void ath9k_hw_4k_set_board_values(struct ath_hw *ah,
struct ath9k_channel *chan)
{
Expand Down Expand Up @@ -1313,38 +1317,110 @@ static void ath9k_hw_4k_set_board_values(struct ath_hw *ah,
}
}

ath9k_hw_analog_shift_rmw(ah, AR9285_AN_RF2G3,
AR9285_AN_RF2G3_OB_0, AR9285_AN_RF2G3_OB_0_S, ob[0]);
ath9k_hw_analog_shift_rmw(ah, AR9285_AN_RF2G3,
AR9285_AN_RF2G3_OB_1, AR9285_AN_RF2G3_OB_1_S, ob[1]);
ath9k_hw_analog_shift_rmw(ah, AR9285_AN_RF2G3,
AR9285_AN_RF2G3_OB_2, AR9285_AN_RF2G3_OB_2_S, ob[2]);
ath9k_hw_analog_shift_rmw(ah, AR9285_AN_RF2G3,
AR9285_AN_RF2G3_OB_3, AR9285_AN_RF2G3_OB_3_S, ob[3]);
ath9k_hw_analog_shift_rmw(ah, AR9285_AN_RF2G3,
AR9285_AN_RF2G3_OB_4, AR9285_AN_RF2G3_OB_4_S, ob[4]);

ath9k_hw_analog_shift_rmw(ah, AR9285_AN_RF2G3,
AR9285_AN_RF2G3_DB1_0, AR9285_AN_RF2G3_DB1_0_S, db1[0]);
ath9k_hw_analog_shift_rmw(ah, AR9285_AN_RF2G3,
AR9285_AN_RF2G3_DB1_1, AR9285_AN_RF2G3_DB1_1_S, db1[1]);
ath9k_hw_analog_shift_rmw(ah, AR9285_AN_RF2G3,
AR9285_AN_RF2G3_DB1_2, AR9285_AN_RF2G3_DB1_2_S, db1[2]);
ath9k_hw_analog_shift_rmw(ah, AR9285_AN_RF2G4,
AR9285_AN_RF2G4_DB1_3, AR9285_AN_RF2G4_DB1_3_S, db1[3]);
ath9k_hw_analog_shift_rmw(ah, AR9285_AN_RF2G4,
AR9285_AN_RF2G4_DB1_4, AR9285_AN_RF2G4_DB1_4_S, db1[4]);

ath9k_hw_analog_shift_rmw(ah, AR9285_AN_RF2G4,
AR9285_AN_RF2G4_DB2_0, AR9285_AN_RF2G4_DB2_0_S, db2[0]);
ath9k_hw_analog_shift_rmw(ah, AR9285_AN_RF2G4,
AR9285_AN_RF2G4_DB2_1, AR9285_AN_RF2G4_DB2_1_S, db2[1]);
ath9k_hw_analog_shift_rmw(ah, AR9285_AN_RF2G4,
AR9285_AN_RF2G4_DB2_2, AR9285_AN_RF2G4_DB2_2_S, db2[2]);
ath9k_hw_analog_shift_rmw(ah, AR9285_AN_RF2G4,
AR9285_AN_RF2G4_DB2_3, AR9285_AN_RF2G4_DB2_3_S, db2[3]);
ath9k_hw_analog_shift_rmw(ah, AR9285_AN_RF2G4,
AR9285_AN_RF2G4_DB2_4, AR9285_AN_RF2G4_DB2_4_S, db2[4]);
if (AR_SREV_9271(ah)) {
ath9k_hw_analog_shift_rmw(ah,
AR9285_AN_RF2G3,
AR9271_AN_RF2G3_OB_cck,
AR9271_AN_RF2G3_OB_cck_S,
ob[0]);
ath9k_hw_analog_shift_rmw(ah,
AR9285_AN_RF2G3,
AR9271_AN_RF2G3_OB_psk,
AR9271_AN_RF2G3_OB_psk_S,
ob[1]);
ath9k_hw_analog_shift_rmw(ah,
AR9285_AN_RF2G3,
AR9271_AN_RF2G3_OB_qam,
AR9271_AN_RF2G3_OB_qam_S,
ob[2]);
ath9k_hw_analog_shift_rmw(ah,
AR9285_AN_RF2G3,
AR9271_AN_RF2G3_DB_1,
AR9271_AN_RF2G3_DB_1_S,
db1[0]);
ath9k_hw_analog_shift_rmw(ah,
AR9285_AN_RF2G4,
AR9271_AN_RF2G4_DB_2,
AR9271_AN_RF2G4_DB_2_S,
db2[0]);
} else {
ath9k_hw_analog_shift_rmw(ah,
AR9285_AN_RF2G3,
AR9285_AN_RF2G3_OB_0,
AR9285_AN_RF2G3_OB_0_S,
ob[0]);
ath9k_hw_analog_shift_rmw(ah,
AR9285_AN_RF2G3,
AR9285_AN_RF2G3_OB_1,
AR9285_AN_RF2G3_OB_1_S,
ob[1]);
ath9k_hw_analog_shift_rmw(ah,
AR9285_AN_RF2G3,
AR9285_AN_RF2G3_OB_2,
AR9285_AN_RF2G3_OB_2_S,
ob[2]);
ath9k_hw_analog_shift_rmw(ah,
AR9285_AN_RF2G3,
AR9285_AN_RF2G3_OB_3,
AR9285_AN_RF2G3_OB_3_S,
ob[3]);
ath9k_hw_analog_shift_rmw(ah,
AR9285_AN_RF2G3,
AR9285_AN_RF2G3_OB_4,
AR9285_AN_RF2G3_OB_4_S,
ob[4]);

ath9k_hw_analog_shift_rmw(ah,
AR9285_AN_RF2G3,
AR9285_AN_RF2G3_DB1_0,
AR9285_AN_RF2G3_DB1_0_S,
db1[0]);
ath9k_hw_analog_shift_rmw(ah,
AR9285_AN_RF2G3,
AR9285_AN_RF2G3_DB1_1,
AR9285_AN_RF2G3_DB1_1_S,
db1[1]);
ath9k_hw_analog_shift_rmw(ah,
AR9285_AN_RF2G3,
AR9285_AN_RF2G3_DB1_2,
AR9285_AN_RF2G3_DB1_2_S,
db1[2]);
ath9k_hw_analog_shift_rmw(ah,
AR9285_AN_RF2G4,
AR9285_AN_RF2G4_DB1_3,
AR9285_AN_RF2G4_DB1_3_S,
db1[3]);
ath9k_hw_analog_shift_rmw(ah,
AR9285_AN_RF2G4,
AR9285_AN_RF2G4_DB1_4,
AR9285_AN_RF2G4_DB1_4_S, db1[4]);

ath9k_hw_analog_shift_rmw(ah,
AR9285_AN_RF2G4,
AR9285_AN_RF2G4_DB2_0,
AR9285_AN_RF2G4_DB2_0_S,
db2[0]);
ath9k_hw_analog_shift_rmw(ah,
AR9285_AN_RF2G4,
AR9285_AN_RF2G4_DB2_1,
AR9285_AN_RF2G4_DB2_1_S,
db2[1]);
ath9k_hw_analog_shift_rmw(ah,
AR9285_AN_RF2G4,
AR9285_AN_RF2G4_DB2_2,
AR9285_AN_RF2G4_DB2_2_S,
db2[2]);
ath9k_hw_analog_shift_rmw(ah,
AR9285_AN_RF2G4,
AR9285_AN_RF2G4_DB2_3,
AR9285_AN_RF2G4_DB2_3_S,
db2[3]);
ath9k_hw_analog_shift_rmw(ah,
AR9285_AN_RF2G4,
AR9285_AN_RF2G4_DB2_4,
AR9285_AN_RF2G4_DB2_4_S,
db2[4]);
}


if (AR_SREV_9285_11(ah))
Expand Down Expand Up @@ -3984,7 +4060,7 @@ int ath9k_hw_eeprom_init(struct ath_hw *ah)
if (AR_SREV_9287(ah)) {
ah->eep_map = EEP_MAP_AR9287;
ah->eep_ops = &eep_AR9287_ops;
} else if (AR_SREV_9285(ah)) {
} else if (AR_SREV_9285(ah) || AR_SREV_9271(ah)) {
ah->eep_map = EEP_MAP_4KBITS;
ah->eep_ops = &eep_4k_ops;
} else {
Expand Down
Loading

0 comments on commit d7e7d22

Please sign in to comment.