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yaml
---
r: 101435
b: refs/heads/master
c: 7afed6a
h: refs/heads/master
i:
  101433: a094f54
  101431: 85ecff2
v: v3
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Dmitri Vorobiev authored and Ralf Baechle committed Jul 15, 2008
1 parent 6c44bd9 commit d891319
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Showing 2 changed files with 7 additions and 4 deletions.
2 changes: 1 addition & 1 deletion [refs]
Original file line number Diff line number Diff line change
@@ -1,2 +1,2 @@
---
refs/heads/master: d58eaab5a01b9cf1819ec57271ac214a39bf6278
refs/heads/master: 7afed6a6c92fadedde8474bbfd92d6debc5e23b0
9 changes: 6 additions & 3 deletions trunk/arch/mips/mips-boards/malta/malta_int.c
Original file line number Diff line number Diff line change
Expand Up @@ -363,6 +363,7 @@ static msc_irqmap_t __initdata msc_eicirqmap[] = {

static int __initdata msc_nr_eicirqs = ARRAY_SIZE(msc_eicirqmap);

#if defined(CONFIG_MIPS_MT_SMP)
/*
* This GIC specific tabular array defines the association between External
* Interrupts and CPUs/Core Interrupts. The nature of the External
Expand Down Expand Up @@ -394,6 +395,7 @@ static struct gic_intr_map gic_intr_map[] = {
{ GIC_EXT_INTR(22), 3, GIC_CPU_INT1, GIC_POL_POS, GIC_TRIG_EDGE, 1 },
{ GIC_EXT_INTR(23), 3, GIC_CPU_INT2, GIC_POL_POS, GIC_TRIG_EDGE, 1 },
};
#endif

/*
* GCMP needs to be detected before any SMP initialisation
Expand All @@ -412,7 +414,8 @@ int __init gcmp_probe(unsigned long addr, unsigned long size)
return gcmp_present;
}

void __init fill_ipi_map(void)
#if defined(CONFIG_MIPS_MT_SMP)
static void __init fill_ipi_map(void)
{
int i;

Expand All @@ -422,6 +425,7 @@ void __init fill_ipi_map(void)
(1 << (gic_intr_map[i].pin + 2));
}
}
#endif

void __init arch_init_irq(void)
{
Expand Down Expand Up @@ -527,7 +531,6 @@ void __init arch_init_irq(void)
.call = GIC_IPI_EXT_INTR_CALLFNC_VPE3
}
};
#define NIPI ARRAY_SIZE(ipiirq)
fill_ipi_map();
gic_init(GIC_BASE_ADDR, GIC_ADDRSPACE_SZ, gic_intr_map, ARRAY_SIZE(gic_intr_map), MIPS_GIC_IRQ_BASE);
if (!gcmp_present) {
Expand All @@ -549,7 +552,7 @@ void __init arch_init_irq(void)
printk("CPU%d: status register now %08x\n", smp_processor_id(), read_c0_status());
write_c0_status(0x1100dc00);
printk("CPU%d: status register frc %08x\n", smp_processor_id(), read_c0_status());
for (i = 0; i < NIPI; i++) {
for (i = 0; i < ARRAY_SIZE(ipiirq); i++) {
setup_irq(MIPS_GIC_IRQ_BASE + ipiirq[i].resched, &irq_resched);
setup_irq(MIPS_GIC_IRQ_BASE + ipiirq[i].call, &irq_call);

Expand Down

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