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yaml
---
r: 191729
b: refs/heads/master
c: b0c4c89
h: refs/heads/master
i:
  191727: 462a619
v: v3
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Hartley Sweeten authored and Russell King committed Apr 14, 2010
1 parent fe82881 commit d8e464b
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Showing 4 changed files with 53 additions and 77 deletions.
2 changes: 1 addition & 1 deletion [refs]
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Original file line number Diff line number Diff line change
@@ -1,2 +1,2 @@
---
refs/heads/master: 8716011315a5b2fa932fa1e7570c34975ed2cb14
refs/heads/master: b0c4c898833250ed143e615c32ea1be0e2155fdc
107 changes: 52 additions & 55 deletions trunk/arch/arm/common/vic.c
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Original file line number Diff line number Diff line change
Expand Up @@ -266,13 +266,53 @@ static int vic_set_wake(unsigned int irq, unsigned int on)
#endif /* CONFIG_PM */

static struct irq_chip vic_chip = {
.name = "VIC",
.ack = vic_ack_irq,
.mask = vic_mask_irq,
.unmask = vic_unmask_irq,
.set_wake = vic_set_wake,
.name = "VIC",
.ack = vic_ack_irq,
.mask = vic_mask_irq,
.unmask = vic_unmask_irq,
.set_wake = vic_set_wake,
};

static void __init vic_disable(void __iomem *base)
{
writel(0, base + VIC_INT_SELECT);
writel(0, base + VIC_INT_ENABLE);
writel(~0, base + VIC_INT_ENABLE_CLEAR);
writel(0, base + VIC_IRQ_STATUS);
writel(0, base + VIC_ITCR);
writel(~0, base + VIC_INT_SOFT_CLEAR);
}

static void __init vic_clear_interrupts(void __iomem *base)
{
unsigned int i;

writel(0, base + VIC_PL190_VECT_ADDR);
for (i = 0; i < 19; i++) {
unsigned int value;

value = readl(base + VIC_PL190_VECT_ADDR);
writel(value, base + VIC_PL190_VECT_ADDR);
}
}

static void __init vic_set_irq_sources(void __iomem *base,
unsigned int irq_start, u32 vic_sources)
{
unsigned int i;

for (i = 0; i < 32; i++) {
if (vic_sources & (1 << i)) {
unsigned int irq = irq_start + i;

set_irq_chip(irq, &vic_chip);
set_irq_chip_data(irq, base);
set_irq_handler(irq, handle_level_irq);
set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
}
}
}

/*
* The PL190 cell from ARM has been modified by ST to handle 64 interrupts.
* The original cell has 32 interrupts, while the modified one has 64,
Expand All @@ -287,13 +327,7 @@ static void __init vic_init_st(void __iomem *base, unsigned int irq_start,
int vic_2nd_block = ((unsigned long)base & ~PAGE_MASK) != 0;

/* Disable all interrupts initially. */

writel(0, base + VIC_INT_SELECT);
writel(0, base + VIC_INT_ENABLE);
writel(~0, base + VIC_INT_ENABLE_CLEAR);
writel(0, base + VIC_IRQ_STATUS);
writel(0, base + VIC_ITCR);
writel(~0, base + VIC_INT_SOFT_CLEAR);
vic_disable(base);

/*
* Make sure we clear all existing interrupts. The vector registers
Expand All @@ -302,13 +336,8 @@ static void __init vic_init_st(void __iomem *base, unsigned int irq_start,
* the second base address, which is 0x20 in the page
*/
if (vic_2nd_block) {
writel(0, base + VIC_PL190_VECT_ADDR);
for (i = 0; i < 19; i++) {
unsigned int value;
vic_clear_interrupts(base);

value = readl(base + VIC_PL190_VECT_ADDR);
writel(value, base + VIC_PL190_VECT_ADDR);
}
/* ST has 16 vectors as well, but we don't enable them by now */
for (i = 0; i < 16; i++) {
void __iomem *reg = base + VIC_VECT_CNTL0 + (i * 4);
Expand All @@ -318,16 +347,7 @@ static void __init vic_init_st(void __iomem *base, unsigned int irq_start,
writel(32, base + VIC_PL190_DEF_VECT_ADDR);
}

for (i = 0; i < 32; i++) {
if (vic_sources & (1 << i)) {
unsigned int irq = irq_start + i;

set_irq_chip(irq, &vic_chip);
set_irq_chip_data(irq, base);
set_irq_handler(irq, handle_level_irq);
set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
}
}
vic_set_irq_sources(base, irq_start, vic_sources);
}

/**
Expand Down Expand Up @@ -365,37 +385,14 @@ void __init vic_init(void __iomem *base, unsigned int irq_start,
}

/* Disable all interrupts initially. */
vic_disable(base);

writel(0, base + VIC_INT_SELECT);
writel(0, base + VIC_INT_ENABLE);
writel(~0, base + VIC_INT_ENABLE_CLEAR);
writel(0, base + VIC_IRQ_STATUS);
writel(0, base + VIC_ITCR);
writel(~0, base + VIC_INT_SOFT_CLEAR);

/*
* Make sure we clear all existing interrupts
*/
writel(0, base + VIC_PL190_VECT_ADDR);
for (i = 0; i < 19; i++) {
unsigned int value;

value = readl(base + VIC_PL190_VECT_ADDR);
writel(value, base + VIC_PL190_VECT_ADDR);
}
/* Make sure we clear all existing interrupts */
vic_clear_interrupts(base);

vic_init2(base);

for (i = 0; i < 32; i++) {
if (vic_sources & (1 << i)) {
unsigned int irq = irq_start + i;

set_irq_chip(irq, &vic_chip);
set_irq_chip_data(irq, base);
set_irq_handler(irq, handle_level_irq);
set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
}
}
vic_set_irq_sources(base, irq_start, vic_sources);

vic_pm_register(base, irq_start, resume_sources);
}
5 changes: 0 additions & 5 deletions trunk/arch/arm/include/asm/pmu.h
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Original file line number Diff line number Diff line change
Expand Up @@ -12,11 +12,6 @@
#ifndef __ARM_PMU_H__
#define __ARM_PMU_H__

enum arm_pmu_type {
ARM_PMU_DEVICE_CPU = 0,
ARM_NUM_PMU_DEVICES,
};

#ifdef CONFIG_CPU_HAS_PMU

struct pmu_irqs {
Expand Down
16 changes: 0 additions & 16 deletions trunk/arch/arm/mach-bcmring/arch.c
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Original file line number Diff line number Diff line change
Expand Up @@ -29,7 +29,6 @@
#include <asm/setup.h>
#include <asm/mach-types.h>
#include <asm/mach/time.h>
#include <asm/pmu.h>

#include <asm/mach/arch.h>
#include <mach/dma.h>
Expand Down Expand Up @@ -86,23 +85,8 @@ static struct platform_device nand_device = {
.num_resources = ARRAY_SIZE(nand_resource),
};

static struct resource pmu_resource = {
.start = IRQ_PMUIRQ,
.end = IRQ_PMUIRQ,
.flags = IORESOURCE_IRQ,
};

static struct platform_device pmu_device = {
.name = "arm-pmu",
.id = ARM_PMU_DEVICE_CPU,
.resource = &pmu_resource,
.num_resources = 1,
};


static struct platform_device *devices[] __initdata = {
&nand_device,
&pmu_device,
};

/****************************************************************************
Expand Down

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