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[PATCH] i386: Clean up smp_tune_scheduling()
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- remove the write-only local variable "bandwidth"
- don't set "max_cache_size" in the (cachesize < 0) case:
  that's already handled in kernel/sched.c:measure_migration_cost()

Signed-off-by: Adrian Bunk <bunk@stusta.de>
Signed-off-by: Andi Kleen <ak@suse.de>
Acked-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Andrew Morton <akpm@osdl.org>
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Adrian Bunk authored and Andi Kleen committed Dec 7, 2006
1 parent b65780e commit d9408ce
Showing 1 changed file with 5 additions and 24 deletions.
29 changes: 5 additions & 24 deletions arch/i386/kernel/smpboot.c
Original file line number Diff line number Diff line change
Expand Up @@ -1130,34 +1130,15 @@ static int __cpuinit __smp_prepare_cpu(int cpu)
}
#endif

static void smp_tune_scheduling (void)
static void smp_tune_scheduling(void)
{
unsigned long cachesize; /* kB */
unsigned long bandwidth = 350; /* MB/s */
/*
* Rough estimation for SMP scheduling, this is the number of
* cycles it takes for a fully memory-limited process to flush
* the SMP-local cache.
*
* (For a P5 this pretty much means we will choose another idle
* CPU almost always at wakeup time (this is due to the small
* L1 cache), on PIIs it's around 50-100 usecs, depending on
* the cache size)
*/

if (!cpu_khz) {
/*
* this basically disables processor-affinity
* scheduling on SMP without a TSC.
*/
return;
} else {
if (cpu_khz) {
cachesize = boot_cpu_data.x86_cache_size;
if (cachesize == -1) {
cachesize = 16; /* Pentiums, 2x8kB cache */
bandwidth = 100;
}
max_cache_size = cachesize * 1024;

if (cachesize > 0)
max_cache_size = cachesize * 1024;
}
}

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