Skip to content

Commit

Permalink
---
Browse files Browse the repository at this point in the history
yaml
---
r: 123998
b: refs/heads/master
c: 2d6a7b7
h: refs/heads/master
v: v3
  • Loading branch information
Yevgeny Petrilin authored and David S. Miller committed Dec 30, 2008
1 parent dd4444f commit d9e3be8
Show file tree
Hide file tree
Showing 3 changed files with 5 additions and 14 deletions.
2 changes: 1 addition & 1 deletion [refs]
Original file line number Diff line number Diff line change
@@ -1,2 +1,2 @@
---
refs/heads/master: c2b559ed8683ffb5a7bdd9e71b3803b231623c86
refs/heads/master: 2d6a7b7559b47f81c50a1df91910edefff79b9b4
12 changes: 4 additions & 8 deletions trunk/drivers/net/mlx4/en_main.c
Original file line number Diff line number Diff line change
Expand Up @@ -169,14 +169,10 @@ static void *mlx4_en_add(struct mlx4_dev *dev)
mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH) {
mlx4_info(mdev, "Using %d tx rings for port:%d\n",
mdev->profile.prof[i].tx_ring_num, i);
if (!mdev->profile.prof[i].rx_ring_num) {
mdev->profile.prof[i].rx_ring_num =
min_t(int, dev->caps.num_comp_vectors, MAX_RX_RINGS);
mlx4_info(mdev, "Defaulting to %d rx rings for port:%d\n",
mdev->profile.prof[i].rx_ring_num, i);
} else
mlx4_info(mdev, "Using %d rx rings for port:%d\n",
mdev->profile.prof[i].rx_ring_num, i);
mdev->profile.prof[i].rx_ring_num =
min_t(int, dev->caps.num_comp_vectors, MAX_RX_RINGS);
mlx4_info(mdev, "Defaulting to %d rx rings for port:%d\n",
mdev->profile.prof[i].rx_ring_num, i);
}

/* Create our own workqueue for reset/multicast tasks
Expand Down
5 changes: 0 additions & 5 deletions trunk/drivers/net/mlx4/en_params.c
Original file line number Diff line number Diff line change
Expand Up @@ -65,9 +65,6 @@ MLX4_EN_PARM_INT(pfctx, 0, "Priority based Flow Control policy on TX[7:0]."
MLX4_EN_PARM_INT(pfcrx, 0, "Priority based Flow Control policy on RX[7:0]."
" Per priority bit mask");

MLX4_EN_PARM_INT(rx_ring_num1, 0, "Number or Rx rings for port 1 (0 = #cores)");
MLX4_EN_PARM_INT(rx_ring_num2, 0, "Number or Rx rings for port 2 (0 = #cores)");

MLX4_EN_PARM_INT(tx_ring_size1, MLX4_EN_AUTO_CONF, "Tx ring size for port 1");
MLX4_EN_PARM_INT(tx_ring_size2, MLX4_EN_AUTO_CONF, "Tx ring size for port 2");
MLX4_EN_PARM_INT(rx_ring_size1, MLX4_EN_AUTO_CONF, "Rx ring size for port 1");
Expand Down Expand Up @@ -95,8 +92,6 @@ int mlx4_en_get_profile(struct mlx4_en_dev *mdev)
params->prof[1].tx_ring_num = 1;
params->prof[2].tx_ring_num = 1;
}
params->prof[1].rx_ring_num = min_t(int, rx_ring_num1, MAX_RX_RINGS);
params->prof[2].rx_ring_num = min_t(int, rx_ring_num2, MAX_RX_RINGS);

if (tx_ring_size1 == MLX4_EN_AUTO_CONF)
tx_ring_size1 = MLX4_EN_DEF_TX_RING_SIZE;
Expand Down

0 comments on commit d9e3be8

Please sign in to comment.