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r: 251126
b: refs/heads/master
c: 19426a8
h: refs/heads/master
v: v3
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Linus Torvalds committed May 25, 2011
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2 changes: 1 addition & 1 deletion [refs]
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@@ -1,2 +1,2 @@
---
refs/heads/master: 8af088710d1eb3c980e0ef3779c8d47f3f217b48
refs/heads/master: 19426a8f810752b4218e59b1e2187f33e255f7bc
1 change: 1 addition & 0 deletions trunk/.gitignore
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Expand Up @@ -57,6 +57,7 @@ modules.builtin
include/config
include/linux/version.h
include/generated
arch/*/include/generated

# stgit generated dirs
patches-*
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4 changes: 4 additions & 0 deletions trunk/CREDITS
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Expand Up @@ -2943,6 +2943,10 @@ S: Kasarmikatu 11 A4
S: 70110 Kuopio
S: Finland

N: Tobias Ringström
E: tori@unhappy.mine.nu
D: Davicom DM9102(A)/DM9132/DM9801 fast ethernet driver

N: Luca Risolia
E: luca.risolia@studio.unibo.it
P: 1024D/FCE635A4 88E8 F32F 7244 68BA 3958 5D40 99DA 5D2A FCE6 35A4
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2 changes: 1 addition & 1 deletion trunk/Documentation/DocBook/Makefile
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Expand Up @@ -73,7 +73,7 @@ installmandocs: mandocs
###
#External programs used
KERNELDOC = $(srctree)/scripts/kernel-doc
DOCPROC = $(objtree)/scripts/basic/docproc
DOCPROC = $(objtree)/scripts/docproc

XMLTOFLAGS = -m $(srctree)/Documentation/DocBook/stylesheet.xsl
XMLTOFLAGS += --skip-validation
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17 changes: 13 additions & 4 deletions trunk/Documentation/IRQ-affinity.txt
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Expand Up @@ -4,10 +4,11 @@ ChangeLog:

SMP IRQ affinity

/proc/irq/IRQ#/smp_affinity specifies which target CPUs are permitted
for a given IRQ source. It's a bitmask of allowed CPUs. It's not allowed
to turn off all CPUs, and if an IRQ controller does not support IRQ
affinity then the value will not change from the default 0xffffffff.
/proc/irq/IRQ#/smp_affinity and /proc/irq/IRQ#/smp_affinity_list specify
which target CPUs are permitted for a given IRQ source. It's a bitmask
(smp_affinity) or cpu list (smp_affinity_list) of allowed CPUs. It's not
allowed to turn off all CPUs, and if an IRQ controller does not support
IRQ affinity then the value will not change from the default of all cpus.

/proc/irq/default_smp_affinity specifies default affinity mask that applies
to all non-active IRQs. Once IRQ is allocated/activated its affinity bitmask
Expand Down Expand Up @@ -54,3 +55,11 @@ round-trip min/avg/max = 0.1/0.5/585.4 ms
This time around IRQ44 was delivered only to the last four processors.
i.e counters for the CPU0-3 did not change.

Here is an example of limiting that same irq (44) to cpus 1024 to 1031:

[root@moon 44]# echo 1024-1031 > smp_affinity
[root@moon 44]# cat smp_affinity
1024-1031

Note that to do this with a bitmask would require 32 bitmasks of zero
to follow the pertinent one.
2 changes: 1 addition & 1 deletion trunk/Documentation/cachetlb.txt
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Expand Up @@ -16,7 +16,7 @@ on all processors in the system. Don't let this scare you into
thinking SMP cache/tlb flushing must be so inefficient, this is in
fact an area where many optimizations are possible. For example,
if it can be proven that a user address space has never executed
on a cpu (see vma->cpu_vm_mask), one need not perform a flush
on a cpu (see mm_cpumask()), one need not perform a flush
for this address space on that cpu.

First, the TLB flushing interfaces, since they are the simplest. The
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11 changes: 9 additions & 2 deletions trunk/Documentation/filesystems/proc.txt
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Expand Up @@ -574,6 +574,12 @@ The contents of each smp_affinity file is the same by default:
> cat /proc/irq/0/smp_affinity
ffffffff

There is an alternate interface, smp_affinity_list which allows specifying
a cpu range instead of a bitmask:

> cat /proc/irq/0/smp_affinity_list
1024-1031

The default_smp_affinity mask applies to all non-active IRQs, which are the
IRQs which have not yet been allocated/activated, and hence which lack a
/proc/irq/[0-9]* directory.
Expand All @@ -583,12 +589,13 @@ reports itself as being attached. This hardware locality information does not
include information about any possible driver locality preference.

prof_cpu_mask specifies which CPUs are to be profiled by the system wide
profiler. Default value is ffffffff (all cpus).
profiler. Default value is ffffffff (all cpus if there are only 32 of them).

The way IRQs are routed is handled by the IO-APIC, and it's Round Robin
between all the CPUs which are allowed to handle it. As usual the kernel has
more info than you and does a better job than you, so the defaults are the
best choice for almost everyone.
best choice for almost everyone. [Note this applies only to those IO-APIC's
that support "Round Robin" interrupt distribution.]

There are three more important subdirectories in /proc: net, scsi, and sys.
The general rule is that the contents, or even the existence of these
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26 changes: 2 additions & 24 deletions trunk/Documentation/filesystems/ubifs.txt
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Expand Up @@ -115,28 +115,8 @@ ubi.mtd=0 root=ubi0:rootfs rootfstype=ubifs
Module Parameters for Debugging
===============================

When UBIFS has been compiled with debugging enabled, there are 3 module
When UBIFS has been compiled with debugging enabled, there are 2 module
parameters that are available to control aspects of testing and debugging.
The parameters are unsigned integers where each bit controls an option.
The parameters are:

debug_msgs Selects which debug messages to display, as follows:

Message Type Flag value

General messages 1
Journal messages 2
Mount messages 4
Commit messages 8
LEB search messages 16
Budgeting messages 32
Garbage collection messages 64
Tree Node Cache (TNC) messages 128
LEB properties (lprops) messages 256
Input/output messages 512
Log messages 1024
Scan messages 2048
Recovery messages 4096

debug_chks Selects extra checks that UBIFS can do while running:

Expand All @@ -154,11 +134,9 @@ debug_tsts Selects a mode of testing, as follows:

Test mode Flag value

Force in-the-gaps method 2
Failure mode for recovery testing 4

For example, set debug_msgs to 5 to display General messages and Mount
messages.
For example, set debug_chks to 3 to enable general and TNC checks.


References
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1 change: 1 addition & 0 deletions trunk/Documentation/i2c/busses/i2c-i801
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Expand Up @@ -19,6 +19,7 @@ Supported adapters:
* Intel 6 Series (PCH)
* Intel Patsburg (PCH)
* Intel DH89xxCC (PCH)
* Intel Panther Point (PCH)
Datasheets: Publicly available at the Intel website

On Intel Patsburg and later chipsets, both the normal host SMBus controller
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2 changes: 1 addition & 1 deletion trunk/Documentation/i2c/writing-clients
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Expand Up @@ -38,7 +38,7 @@ static struct i2c_driver foo_driver = {
.name = "foo",
},

.id_table = foo_ids,
.id_table = foo_idtable,
.probe = foo_probe,
.remove = foo_remove,
/* if device autodetection is needed: */
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123 changes: 100 additions & 23 deletions trunk/Documentation/input/elantech.txt
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Expand Up @@ -34,7 +34,8 @@ Contents
Currently the Linux Elantech touchpad driver is aware of two different
hardware versions unimaginatively called version 1 and version 2. Version 1
is found in "older" laptops and uses 4 bytes per packet. Version 2 seems to
be introduced with the EeePC and uses 6 bytes per packet.
be introduced with the EeePC and uses 6 bytes per packet, and provides
additional features such as position of two fingers, and width of the touch.

The driver tries to support both hardware versions and should be compatible
with the Xorg Synaptics touchpad driver and its graphical configuration
Expand Down Expand Up @@ -94,18 +95,44 @@ Currently the Linux Elantech touchpad driver provides two extra knobs under
can check these bits and reject any packet that appears corrupted. Using
this knob you can bypass that check.

It is not known yet whether hardware version 2 provides the same parity
bits. Hence checking is disabled by default. Currently even turning it on
will do nothing.

Hardware version 2 does not provide the same parity bits. Only some basic
data consistency checking can be done. For now checking is disabled by
default. Currently even turning it on will do nothing.

/////////////////////////////////////////////////////////////////////////////

3. Differentiating hardware versions
=================================

To detect the hardware version, read the version number as param[0].param[1].param[2]

4 bytes version: (after the arrow is the name given in the Dell-provided driver)
02.00.22 => EF013
02.06.00 => EF019
In the wild, there appear to be more versions, such as 00.01.64, 01.00.21,
02.00.00, 02.00.04, 02.00.06.

6 bytes:
02.00.30 => EF113
02.08.00 => EF023
02.08.XX => EF123
02.0B.00 => EF215
04.01.XX => Scroll_EF051
04.02.XX => EF051
In the wild, there appear to be more versions, such as 04.03.01, 04.04.11. There
appears to be almost no difference, except for EF113, which does not report
pressure/width and has different data consistency checks.

Probably all the versions with param[0] <= 01 can be considered as
4 bytes/firmware 1. The versions < 02.08.00, with the exception of 02.00.30, as
4 bytes/firmware 2. Everything >= 02.08.00 can be considered as 6 bytes.

/////////////////////////////////////////////////////////////////////////////

3. Hardware version 1
4. Hardware version 1
==================

3.1 Registers
4.1 Registers
~~~~~~~~~

By echoing a hexadecimal value to a register it contents can be altered.
Expand Down Expand Up @@ -168,7 +195,7 @@ For example:
smart edge activation area width?


3.2 Native relative mode 4 byte packet format
4.2 Native relative mode 4 byte packet format
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

byte 0:
Expand Down Expand Up @@ -226,9 +253,13 @@ byte 3:
positive = down


3.3 Native absolute mode 4 byte packet format
4.3 Native absolute mode 4 byte packet format
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

EF013 and EF019 have a special behaviour (due to a bug in the firmware?), and
when 1 finger is touching, the first 2 position reports must be discarded.
This counting is reset whenever a different number of fingers is reported.

byte 0:
firmware version 1.x:

Expand Down Expand Up @@ -279,11 +310,11 @@ byte 3:
/////////////////////////////////////////////////////////////////////////////


4. Hardware version 2
5. Hardware version 2
==================


4.1 Registers
5.1 Registers
~~~~~~~~~

By echoing a hexadecimal value to a register it contents can be altered.
Expand Down Expand Up @@ -316,41 +347,82 @@ For example:
0x7f = never i.e. tap again to release)


4.2 Native absolute mode 6 byte packet format
5.2 Native absolute mode 6 byte packet format
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

4.2.1 One finger touch
5.2.1 Parity checking and packet re-synchronization
There is no parity checking, however some consistency checks can be performed.

For instance for EF113:
SA1= packet[0];
A1 = packet[1];
B1 = packet[2];
SB1= packet[3];
C1 = packet[4];
D1 = packet[5];
if( (((SA1 & 0x3C) != 0x3C) && ((SA1 & 0xC0) != 0x80)) || // check Byte 1
(((SA1 & 0x0C) != 0x0C) && ((SA1 & 0xC0) == 0x80)) || // check Byte 1 (one finger pressed)
(((SA1 & 0xC0) != 0x80) && (( A1 & 0xF0) != 0x00)) || // check Byte 2
(((SB1 & 0x3E) != 0x38) && ((SA1 & 0xC0) != 0x80)) || // check Byte 4
(((SB1 & 0x0E) != 0x08) && ((SA1 & 0xC0) == 0x80)) || // check Byte 4 (one finger pressed)
(((SA1 & 0xC0) != 0x80) && (( C1 & 0xF0) != 0x00)) ) // check Byte 5
// error detected

For all the other ones, there are just a few constant bits:
if( ((packet[0] & 0x0C) != 0x04) ||
((packet[3] & 0x0f) != 0x02) )
// error detected


In case an error is detected, all the packets are shifted by one (and packet[0] is discarded).

5.2.1 One/Three finger touch
~~~~~~~~~~~~~~~~

byte 0:

bit 7 6 5 4 3 2 1 0
n1 n0 . . . . R L
n1 n0 w3 w2 . . R L

L, R = 1 when Left, Right mouse button pressed
n1..n0 = numbers of fingers on touchpad

byte 1:

bit 7 6 5 4 3 2 1 0
. . . . . x10 x9 x8
p7 p6 p5 p4 . x10 x9 x8

byte 2:

bit 7 6 5 4 3 2 1 0
x7 x6 x5 x4 x4 x2 x1 x0
x7 x6 x5 x4 x3 x2 x1 x0

x10..x0 = absolute x value (horizontal)

byte 3:

bit 7 6 5 4 3 2 1 0
. . . . . . . .
n4 vf w1 w0 . . . b2

n4 = set if more than 3 fingers (only in 3 fingers mode)
vf = a kind of flag ? (only on EF123, 0 when finger is over one
of the buttons, 1 otherwise)
w3..w0 = width of the finger touch (not EF113)
b2 (on EF113 only, 0 otherwise), b2.R.L indicates one button pressed:
0 = none
1 = Left
2 = Right
3 = Middle (Left and Right)
4 = Forward
5 = Back
6 = Another one
7 = Another one

byte 4:

bit 7 6 5 4 3 2 1 0
. . . . . . y9 y8
p3 p1 p2 p0 . . y9 y8

p7..p0 = pressure (not EF113)

byte 5:

Expand All @@ -363,6 +435,11 @@ byte 5:
4.2.2 Two finger touch
~~~~~~~~~~~~~~~~

Note that the two pairs of coordinates are not exactly the coordinates of the
two fingers, but only the pair of the lower-left and upper-right coordinates.
So the actual fingers might be situated on the other diagonal of the square
defined by these two points.

byte 0:

bit 7 6 5 4 3 2 1 0
Expand All @@ -376,14 +453,14 @@ byte 1:
bit 7 6 5 4 3 2 1 0
ax7 ax6 ax5 ax4 ax3 ax2 ax1 ax0

ax8..ax0 = first finger absolute x value
ax8..ax0 = lower-left finger absolute x value

byte 2:

bit 7 6 5 4 3 2 1 0
ay7 ay6 ay5 ay4 ay3 ay2 ay1 ay0

ay8..ay0 = first finger absolute y value
ay8..ay0 = lower-left finger absolute y value

byte 3:

Expand All @@ -395,11 +472,11 @@ byte 4:
bit 7 6 5 4 3 2 1 0
bx7 bx6 bx5 bx4 bx3 bx2 bx1 bx0

bx8..bx0 = second finger absolute x value
bx8..bx0 = upper-right finger absolute x value

byte 5:

bit 7 6 5 4 3 2 1 0
by7 by8 by5 by4 by3 by2 by1 by0

by8..by0 = second finger absolute y value
by8..by0 = upper-right finger absolute y value
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