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yaml
---
r: 111689
b: refs/heads/master
c: 500c064
h: refs/heads/master
i:
  111687: 016cc08
v: v3
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Vasanthakumar Thiagarajan authored and John W. Linville committed Sep 15, 2008
1 parent 51e193e commit db8bad2
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Showing 5 changed files with 328 additions and 33 deletions.
2 changes: 1 addition & 1 deletion [refs]
Original file line number Diff line number Diff line change
@@ -1,2 +1,2 @@
---
refs/heads/master: 8feceb67929bd23bfca58d5f49df93d7fc315bb1
refs/heads/master: 500c064d3a5f9c8aa604ef63a1346ab70eed443a
7 changes: 5 additions & 2 deletions trunk/drivers/net/wireless/ath9k/ath9k.h
Original file line number Diff line number Diff line change
Expand Up @@ -798,10 +798,11 @@ struct ath_hal {
struct ath9k_channel *ah_curchan;
u32 ah_nchan;

u16 ah_rfsilent;
bool ah_rfkillEnabled;
bool ah_isPciExpress;
u16 ah_txTrigLevel;
u16 ah_rfsilent;
u32 ah_rfkill_gpio;
u32 ah_rfkill_polarity;

#ifndef ATH_NF_PER_CHAN
struct ath9k_nfcal_hist nfCalHist[NUM_NF_READINGS];
Expand Down Expand Up @@ -1003,4 +1004,6 @@ bool ath9k_get_channel_edges(struct ath_hal *ah,
void ath9k_hw_cfg_output(struct ath_hal *ah, u32 gpio,
u32 ah_signal_type);
void ath9k_hw_set_gpio(struct ath_hal *ah, u32 gpio, u32 value);
u32 ath9k_hw_gpio_get(struct ath_hal *ah, u32 gpio);
void ath9k_hw_cfg_gpio_input(struct ath_hal *ah, u32 gpio);
#endif
16 changes: 16 additions & 0 deletions trunk/drivers/net/wireless/ath9k/core.h
Original file line number Diff line number Diff line change
Expand Up @@ -40,6 +40,7 @@
#include <asm/page.h>
#include <net/mac80211.h>
#include <linux/leds.h>
#include <linux/rfkill.h>

#include "ath9k.h"
#include "rc.h"
Expand Down Expand Up @@ -823,6 +824,15 @@ struct ath_led {
bool registered;
};

/* Rfkill */
#define ATH_RFKILL_POLL_INTERVAL 2000 /* msecs */

struct ath_rfkill {
struct rfkill *rfkill;
struct delayed_work rfkill_poll;
char rfkill_name[32];
};

/********************/
/* Main driver core */
/********************/
Expand Down Expand Up @@ -906,6 +916,9 @@ struct ath_ht_info {
#define SC_OP_PROTECT_ENABLE BIT(8)
#define SC_OP_RXFLUSH BIT(9)
#define SC_OP_LED_ASSOCIATED BIT(10)
#define SC_OP_RFKILL_REGISTERED BIT(11)
#define SC_OP_RFKILL_SW_BLOCKED BIT(12)
#define SC_OP_RFKILL_HW_BLOCKED BIT(13)

struct ath_softc {
struct ieee80211_hw *hw;
Expand Down Expand Up @@ -1015,6 +1028,9 @@ struct ath_softc {
struct ath_led assoc_led;
struct ath_led tx_led;
struct ath_led rx_led;

/* Rfkill */
struct ath_rfkill rf_kill;
};

int ath_init(u16 devid, struct ath_softc *sc);
Expand Down
70 changes: 40 additions & 30 deletions trunk/drivers/net/wireless/ath9k/hw.c
Original file line number Diff line number Diff line change
Expand Up @@ -2821,7 +2821,38 @@ void ath9k_hw_set_gpio(struct ath_hal *ah, u32 gpio, u32 val)
AR_GPIO_BIT(gpio));
}

static u32 ath9k_hw_gpio_get(struct ath_hal *ah, u32 gpio)
/*
* Configure GPIO Input lines
*/
void ath9k_hw_cfg_gpio_input(struct ath_hal *ah, u32 gpio)
{
u32 gpio_shift;

ASSERT(gpio < ah->ah_caps.num_gpio_pins);

gpio_shift = gpio << 1;

REG_RMW(ah,
AR_GPIO_OE_OUT,
(AR_GPIO_OE_OUT_DRV_NO << gpio_shift),
(AR_GPIO_OE_OUT_DRV << gpio_shift));
}

#ifdef CONFIG_RFKILL
static void ath9k_enable_rfkill(struct ath_hal *ah)
{
REG_SET_BIT(ah, AR_GPIO_INPUT_EN_VAL,
AR_GPIO_INPUT_EN_VAL_RFSILENT_BB);

REG_CLR_BIT(ah, AR_GPIO_INPUT_MUX2,
AR_GPIO_INPUT_MUX2_RFSILENT);

ath9k_hw_cfg_gpio_input(ah, ah->ah_rfkill_gpio);
REG_SET_BIT(ah, AR_PHY_TEST, RFSILENT_BB);
}
#endif

u32 ath9k_hw_gpio_get(struct ath_hal *ah, u32 gpio)
{
if (gpio >= ah->ah_caps.num_gpio_pins)
return 0xffffffff;
Expand Down Expand Up @@ -3034,17 +3065,17 @@ static bool ath9k_hw_fill_cap_info(struct ath_hal *ah)

pCap->hw_caps |= ATH9K_HW_CAP_ENHANCEDPM;

#ifdef CONFIG_RFKILL
ah->ah_rfsilent = ath9k_hw_get_eeprom(ahp, EEP_RF_SILENT);
if (ah->ah_rfsilent & EEP_RFSILENT_ENABLED) {
ahp->ah_gpioSelect =
ah->ah_rfkill_gpio =
MS(ah->ah_rfsilent, EEP_RFSILENT_GPIO_SEL);
ahp->ah_polarity =
ah->ah_rfkill_polarity =
MS(ah->ah_rfsilent, EEP_RFSILENT_POLARITY);

ath9k_hw_setcapability(ah, ATH9K_CAP_RFSILENT, 1, true,
NULL);
pCap->hw_caps |= ATH9K_HW_CAP_RFSILENT;
}
#endif

if ((ah->ah_macVersion == AR_SREV_VERSION_5416_PCI) ||
(ah->ah_macVersion == AR_SREV_VERSION_5416_PCIE) ||
Expand Down Expand Up @@ -5961,6 +5992,10 @@ bool ath9k_hw_reset(struct ath_hal *ah,
ath9k_hw_init_interrupt_masks(ah, ah->ah_opmode);
ath9k_hw_init_qos(ah);

#ifdef CONFIG_RFKILL
if (ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
ath9k_enable_rfkill(ah);
#endif
ath9k_hw_init_user_settings(ah);

REG_WRITE(ah, AR_STA_ID1,
Expand Down Expand Up @@ -6490,31 +6525,6 @@ ath9k_hw_setbssidmask(struct ath_hal *ah, const u8 *mask)
return true;
}

#ifdef CONFIG_ATH9K_RFKILL
static void ath9k_enable_rfkill(struct ath_hal *ah)
{
struct ath_hal_5416 *ahp = AH5416(ah);

REG_SET_BIT(ah, AR_GPIO_INPUT_EN_VAL,
AR_GPIO_INPUT_EN_VAL_RFSILENT_BB);

REG_CLR_BIT(ah, AR_GPIO_INPUT_MUX2,
AR_GPIO_INPUT_MUX2_RFSILENT);

ath9k_hw_cfg_gpio_input(ah, ahp->ah_gpioSelect);
REG_SET_BIT(ah, AR_PHY_TEST, RFSILENT_BB);

if (ahp->ah_gpioBit == ath9k_hw_gpio_get(ah, ahp->ah_gpioSelect)) {

ath9k_hw_set_gpio_intr(ah, ahp->ah_gpioSelect,
!ahp->ah_gpioBit);
} else {
ath9k_hw_set_gpio_intr(ah, ahp->ah_gpioSelect,
ahp->ah_gpioBit);
}
}
#endif

void
ath9k_hw_write_associd(struct ath_hal *ah, const u8 *bssid,
u16 assocId)
Expand Down
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