Skip to content

Commit

Permalink
---
Browse files Browse the repository at this point in the history
yaml
---
r: 275059
b: refs/heads/master
c: 98fb2cc
h: refs/heads/master
i:
  275057: f32a979
  275055: be6fc8a
v: v3
  • Loading branch information
Rajkumar Manoharan authored and John W. Linville committed Nov 2, 2011
1 parent 925e118 commit dbaf937
Show file tree
Hide file tree
Showing 2 changed files with 6 additions and 6 deletions.
2 changes: 1 addition & 1 deletion [refs]
Original file line number Diff line number Diff line change
@@ -1,2 +1,2 @@
---
refs/heads/master: e3a4cc2f073739c9c9c2e97efc774703061f034a
refs/heads/master: 98fb2cc115b4ef1ea0a2d87a170c183bd395dd6c
10 changes: 5 additions & 5 deletions trunk/drivers/net/wireless/ath/ath9k/ar9485_initvals.h
Original file line number Diff line number Diff line change
Expand Up @@ -521,7 +521,7 @@ static const u32 ar9485_1_1_radio_postamble[][2] = {
{0x000160ac, 0x24611800},
{0x000160b0, 0x03284f3e},
{0x0001610c, 0x00170000},
{0x00016140, 0x10804008},
{0x00016140, 0x50804008},
};

static const u32 ar9485_1_1_mac_postamble[][5] = {
Expand Down Expand Up @@ -603,7 +603,7 @@ static const u32 ar9485_1_1_radio_core[][2] = {

static const u32 ar9485_1_1_pcie_phy_pll_on_clkreq_enable_L1[][2] = {
/* Addr allmodes */
{0x00018c00, 0x10052e5e},
{0x00018c00, 0x18052e5e},
{0x00018c04, 0x000801d8},
{0x00018c08, 0x0000080c},
};
Expand Down Expand Up @@ -776,7 +776,7 @@ static const u32 ar9485_modes_green_ob_db_tx_gain_1_1[][5] = {

static const u32 ar9485_1_1_pcie_phy_clkreq_disable_L1[][2] = {
/* Addr allmodes */
{0x00018c00, 0x10013e5e},
{0x00018c00, 0x18013e5e},
{0x00018c04, 0x000801d8},
{0x00018c08, 0x0000080c},
};
Expand Down Expand Up @@ -882,7 +882,7 @@ static const u32 ar9485_fast_clock_1_1_baseband_postamble[][3] = {

static const u32 ar9485_1_1_pcie_phy_pll_on_clkreq_disable_L1[][2] = {
/* Addr allmodes */
{0x00018c00, 0x10012e5e},
{0x00018c00, 0x18012e5e},
{0x00018c04, 0x000801d8},
{0x00018c08, 0x0000080c},
};
Expand Down Expand Up @@ -1021,7 +1021,7 @@ static const u32 ar9485_common_rx_gain_1_1[][2] = {

static const u32 ar9485_1_1_pcie_phy_clkreq_enable_L1[][2] = {
/* Addr allmodes */
{0x00018c00, 0x10053e5e},
{0x00018c00, 0x18053e5e},
{0x00018c04, 0x000801d8},
{0x00018c08, 0x0000080c},
};
Expand Down

0 comments on commit dbaf937

Please sign in to comment.