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ASoC: qcom: Add apq8016 lpass driver support
This patch adds apq8016 lpass driver support. APQ8016 has 4 MI2S which can be routed to one internal codec and 2 external codec interfaces. Primary, Secondary, Quaternary I2S can do Rx(playback) and Tertiary and Quaternary can do Tx(capture). Tested-by: Kenneth Westfield <kwestfie@codeaurora.org> Acked-by: Kenneth Westfield <kwestfie@codeaurora.org> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Mark Brown <broonie@kernel.org>
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Srinivas Kandagatla
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Mark Brown
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May 25, 2015
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#ifndef __DT_APQ8016_LPASS_H | ||
#define __DT_APQ8016_LPASS_H | ||
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#define MI2S_PRIMARY 0 | ||
#define MI2S_SECONDARY 1 | ||
#define MI2S_TERTIARY 2 | ||
#define MI2S_QUATERNARY 3 | ||
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#endif /* __DT_APQ8016_LPASS_H */ |
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/* | ||
* Copyright (c) 2010-2011,2013-2015 The Linux Foundation. All rights reserved. | ||
* | ||
* This program is free software; you can redistribute it and/or modify | ||
* it under the terms of the GNU General Public License version 2 and | ||
* only version 2 as published by the Free Software Foundation. | ||
* | ||
* This program is distributed in the hope that it will be useful, | ||
* but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
* GNU General Public License for more details. | ||
* | ||
* lpass-apq8016.c -- ALSA SoC CPU DAI driver for APQ8016 LPASS | ||
* | ||
*/ | ||
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#include <linux/clk.h> | ||
#include <linux/device.h> | ||
#include <linux/err.h> | ||
#include <linux/kernel.h> | ||
#include <linux/module.h> | ||
#include <linux/of.h> | ||
#include <linux/platform_device.h> | ||
#include <sound/pcm.h> | ||
#include <sound/pcm_params.h> | ||
#include <sound/soc.h> | ||
#include <sound/soc-dai.h> | ||
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#include <dt-bindings/sound/apq8016-lpass.h> | ||
#include "lpass-lpaif-reg.h" | ||
#include "lpass.h" | ||
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static struct snd_soc_dai_driver apq8016_lpass_cpu_dai_driver[] = { | ||
[MI2S_PRIMARY] = { | ||
.id = MI2S_PRIMARY, | ||
.name = "Primary MI2S", | ||
.playback = { | ||
.stream_name = "Primary Playback", | ||
.formats = SNDRV_PCM_FMTBIT_S16 | | ||
SNDRV_PCM_FMTBIT_S24 | | ||
SNDRV_PCM_FMTBIT_S32, | ||
.rates = SNDRV_PCM_RATE_8000 | | ||
SNDRV_PCM_RATE_16000 | | ||
SNDRV_PCM_RATE_32000 | | ||
SNDRV_PCM_RATE_48000 | | ||
SNDRV_PCM_RATE_96000, | ||
.rate_min = 8000, | ||
.rate_max = 96000, | ||
.channels_min = 1, | ||
.channels_max = 8, | ||
}, | ||
.probe = &asoc_qcom_lpass_cpu_dai_probe, | ||
.ops = &asoc_qcom_lpass_cpu_dai_ops, | ||
}, | ||
[MI2S_SECONDARY] = { | ||
.id = MI2S_SECONDARY, | ||
.name = "Secondary MI2S", | ||
.playback = { | ||
.stream_name = "Secondary Playback", | ||
.formats = SNDRV_PCM_FMTBIT_S16 | | ||
SNDRV_PCM_FMTBIT_S24 | | ||
SNDRV_PCM_FMTBIT_S32, | ||
.rates = SNDRV_PCM_RATE_8000 | | ||
SNDRV_PCM_RATE_16000 | | ||
SNDRV_PCM_RATE_32000 | | ||
SNDRV_PCM_RATE_48000 | | ||
SNDRV_PCM_RATE_96000, | ||
.rate_min = 8000, | ||
.rate_max = 96000, | ||
.channels_min = 1, | ||
.channels_max = 8, | ||
}, | ||
.probe = &asoc_qcom_lpass_cpu_dai_probe, | ||
.ops = &asoc_qcom_lpass_cpu_dai_ops, | ||
}, | ||
[MI2S_TERTIARY] = { | ||
.id = MI2S_TERTIARY, | ||
.name = "Tertiary MI2S", | ||
.capture = { | ||
.stream_name = "Tertiary Capture", | ||
.formats = SNDRV_PCM_FMTBIT_S16 | | ||
SNDRV_PCM_FMTBIT_S24 | | ||
SNDRV_PCM_FMTBIT_S32, | ||
.rates = SNDRV_PCM_RATE_8000 | | ||
SNDRV_PCM_RATE_16000 | | ||
SNDRV_PCM_RATE_32000 | | ||
SNDRV_PCM_RATE_48000 | | ||
SNDRV_PCM_RATE_96000, | ||
.rate_min = 8000, | ||
.rate_max = 96000, | ||
.channels_min = 1, | ||
.channels_max = 8, | ||
}, | ||
.probe = &asoc_qcom_lpass_cpu_dai_probe, | ||
.ops = &asoc_qcom_lpass_cpu_dai_ops, | ||
}, | ||
[MI2S_QUATERNARY] = { | ||
.id = MI2S_QUATERNARY, | ||
.name = "Quatenary MI2S", | ||
.playback = { | ||
.stream_name = "Quatenary Playback", | ||
.formats = SNDRV_PCM_FMTBIT_S16 | | ||
SNDRV_PCM_FMTBIT_S24 | | ||
SNDRV_PCM_FMTBIT_S32, | ||
.rates = SNDRV_PCM_RATE_8000 | | ||
SNDRV_PCM_RATE_16000 | | ||
SNDRV_PCM_RATE_32000 | | ||
SNDRV_PCM_RATE_48000 | | ||
SNDRV_PCM_RATE_96000, | ||
.rate_min = 8000, | ||
.rate_max = 96000, | ||
.channels_min = 1, | ||
.channels_max = 8, | ||
}, | ||
.capture = { | ||
.stream_name = "Quatenary Capture", | ||
.formats = SNDRV_PCM_FMTBIT_S16 | | ||
SNDRV_PCM_FMTBIT_S24 | | ||
SNDRV_PCM_FMTBIT_S32, | ||
.rates = SNDRV_PCM_RATE_8000 | | ||
SNDRV_PCM_RATE_16000 | | ||
SNDRV_PCM_RATE_32000 | | ||
SNDRV_PCM_RATE_48000 | | ||
SNDRV_PCM_RATE_96000, | ||
.rate_min = 8000, | ||
.rate_max = 96000, | ||
.channels_min = 1, | ||
.channels_max = 8, | ||
}, | ||
.probe = &asoc_qcom_lpass_cpu_dai_probe, | ||
.ops = &asoc_qcom_lpass_cpu_dai_ops, | ||
}, | ||
}; | ||
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static int apq8016_lpass_alloc_dma_channel(struct lpass_data *drvdata) | ||
{ | ||
struct lpass_variant *v = drvdata->variant; | ||
int chan = find_first_zero_bit(&drvdata->rdma_ch_bit_map, | ||
v->rdma_channels); | ||
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if (chan >= v->rdma_channels) | ||
return -EBUSY; | ||
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set_bit(chan, &drvdata->rdma_ch_bit_map); | ||
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return chan; | ||
} | ||
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static int apq8016_lpass_free_dma_channel(struct lpass_data *drvdata, int chan) | ||
{ | ||
clear_bit(chan, &drvdata->rdma_ch_bit_map); | ||
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return 0; | ||
} | ||
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static int apq8016_lpass_init(struct platform_device *pdev) | ||
{ | ||
struct lpass_data *drvdata = platform_get_drvdata(pdev); | ||
struct device *dev = &pdev->dev; | ||
int ret; | ||
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drvdata->pcnoc_mport_clk = devm_clk_get(dev, "pcnoc-mport-clk"); | ||
if (IS_ERR(drvdata->pcnoc_mport_clk)) { | ||
dev_err(&pdev->dev, "%s() error getting pcnoc-mport-clk: %ld\n", | ||
__func__, PTR_ERR(drvdata->pcnoc_mport_clk)); | ||
return PTR_ERR(drvdata->pcnoc_mport_clk); | ||
} | ||
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ret = clk_prepare_enable(drvdata->pcnoc_mport_clk); | ||
if (ret) { | ||
dev_err(&pdev->dev, "%s() Error enabling pcnoc-mport-clk: %d\n", | ||
__func__, ret); | ||
return ret; | ||
} | ||
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drvdata->pcnoc_sway_clk = devm_clk_get(dev, "pcnoc-sway-clk"); | ||
if (IS_ERR(drvdata->pcnoc_sway_clk)) { | ||
dev_err(&pdev->dev, "%s() error getting pcnoc-sway-clk: %ld\n", | ||
__func__, PTR_ERR(drvdata->pcnoc_sway_clk)); | ||
return PTR_ERR(drvdata->pcnoc_sway_clk); | ||
} | ||
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ret = clk_prepare_enable(drvdata->pcnoc_sway_clk); | ||
if (ret) { | ||
dev_err(&pdev->dev, "%s() Error enabling pcnoc_sway_clk: %d\n", | ||
__func__, ret); | ||
return ret; | ||
} | ||
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return 0; | ||
} | ||
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static int apq8016_lpass_exit(struct platform_device *pdev) | ||
{ | ||
struct lpass_data *drvdata = platform_get_drvdata(pdev); | ||
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clk_disable_unprepare(drvdata->pcnoc_mport_clk); | ||
clk_disable_unprepare(drvdata->pcnoc_sway_clk); | ||
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return 0; | ||
} | ||
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static struct lpass_variant apq8016_data = { | ||
.i2sctrl_reg_base = 0x1000, | ||
.i2sctrl_reg_stride = 0x1000, | ||
.i2s_ports = 4, | ||
.irq_reg_base = 0x6000, | ||
.irq_reg_stride = 0x1000, | ||
.irq_ports = 3, | ||
.rdma_reg_base = 0x8400, | ||
.rdma_reg_stride = 0x1000, | ||
.rdma_channels = 2, | ||
.rdmactl_audif_start = 1, | ||
.dai_driver = apq8016_lpass_cpu_dai_driver, | ||
.num_dai = ARRAY_SIZE(apq8016_lpass_cpu_dai_driver), | ||
.init = apq8016_lpass_init, | ||
.exit = apq8016_lpass_exit, | ||
.alloc_dma_channel = apq8016_lpass_alloc_dma_channel, | ||
.free_dma_channel = apq8016_lpass_free_dma_channel, | ||
}; | ||
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static const struct of_device_id apq8016_lpass_cpu_device_id[] = { | ||
{ .compatible = "qcom,lpass-cpu-apq8016", .data = &apq8016_data }, | ||
{} | ||
}; | ||
MODULE_DEVICE_TABLE(of, apq8016_lpass_cpu_device_id); | ||
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static struct platform_driver apq8016_lpass_cpu_platform_driver = { | ||
.driver = { | ||
.name = "apq8016-lpass-cpu", | ||
.of_match_table = of_match_ptr(apq8016_lpass_cpu_device_id), | ||
}, | ||
.probe = asoc_qcom_lpass_cpu_platform_probe, | ||
.remove = asoc_qcom_lpass_cpu_platform_remove, | ||
}; | ||
module_platform_driver(apq8016_lpass_cpu_platform_driver); | ||
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MODULE_DESCRIPTION("APQ8016 LPASS CPU Driver"); | ||
MODULE_LICENSE("GPL v2"); | ||
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