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r: 20137
b: refs/heads/master
c: 9b4a161
h: refs/heads/master
i:
  20135: d84dccc
v: v3
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Russell King authored and Russell King committed Feb 5, 2006
1 parent 28296c8 commit de6b2e7
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2 changes: 1 addition & 1 deletion [refs]
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@@ -1,2 +1,2 @@
---
refs/heads/master: cce0cac125623f9b68f25dd1350f6d616220a8dd
refs/heads/master: 9b4a1617772d6d5ab5eeda0cd95302fae119e359
2 changes: 1 addition & 1 deletion trunk/CREDITS
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Expand Up @@ -3101,7 +3101,7 @@ S: Minto, NSW, 2566
S: Australia

N: Stephen Smalley
E: sds@tycho.nsa.gov
E: sds@epoch.ncsc.mil
D: portions of the Linux Security Module (LSM) framework and security modules

N: Chris Smith
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9 changes: 0 additions & 9 deletions trunk/Documentation/feature-removal-schedule.txt
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Expand Up @@ -162,12 +162,3 @@ What: pci_module_init(driver)
When: January 2007
Why: Is replaced by pci_register_driver(pci_driver).
Who: Richard Knutsson <ricknu-0@student.ltu.se> and Greg Kroah-Hartman <gregkh@suse.de>

---------------------------

What: I2C interface of the it87 driver
When: January 2007
Why: The ISA interface is faster and should be always available. The I2C
probing is also known to cause trouble in at least one case (see
bug #5889.)
Who: Jean Delvare <khali@linux-fr.org>
105 changes: 0 additions & 105 deletions trunk/Documentation/hwmon/f71805f

This file was deleted.

2 changes: 1 addition & 1 deletion trunk/Documentation/hwmon/it87
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Expand Up @@ -9,7 +9,7 @@ Supported chips:
http://www.ite.com.tw/
* IT8712F
Prefix: 'it8712'
Addresses scanned: I2C 0x2d
Addresses scanned: I2C 0x28 - 0x2f
from Super I/O config space (8 I/O ports)
Datasheet: Publicly available at the ITE website
http://www.ite.com.tw/
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18 changes: 1 addition & 17 deletions trunk/Documentation/hwmon/sysfs-interface
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Expand Up @@ -179,12 +179,11 @@ temp[1-*]_auto_point[1-*]_temp_hyst
****************

temp[1-3]_type Sensor type selection.
Integers 1 to 4 or thermistor Beta value (typically 3435)
Integers 1, 2, 3 or thermistor Beta value (3435)
Read/Write.
1: PII/Celeron Diode
2: 3904 transistor
3: thermal diode
4: thermistor (default/unknown Beta)
Not all types are supported by all chips

temp[1-4]_max Temperature max value.
Expand Down Expand Up @@ -262,21 +261,6 @@ alarms Alarm bitmask.
of individual bits.
Bits are defined in kernel/include/sensors.h.

alarms_in Alarm bitmask relative to in (voltage) channels
Read only
A '1' bit means an alarm, LSB corresponds to in0 and so on
Prefered to 'alarms' for newer chips

alarms_fan Alarm bitmask relative to fan channels
Read only
A '1' bit means an alarm, LSB corresponds to fan1 and so on
Prefered to 'alarms' for newer chips

alarms_temp Alarm bitmask relative to temp (temperature) channels
Read only
A '1' bit means an alarm, LSB corresponds to temp1 and so on
Prefered to 'alarms' for newer chips

beep_enable Beep/interrupt enable
0 to disable.
1 to enable.
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Expand Up @@ -7,7 +7,7 @@ Supported adapters:
Any combination of these host bridges:
645, 645DX (aka 646), 648, 650, 651, 655, 735, 745, 746
and these south bridges:
961, 962, 963(L)
961, 962, 963(L)

Author: Mark M. Hoffman <mhoffman@lightlink.com>

Expand All @@ -29,7 +29,7 @@ The command "lspci" as root should produce something like these lines:

or perhaps this...

00:00.0 Host bridge: Silicon Integrated Systems [SiS]: Unknown device 0645
00:00.0 Host bridge: Silicon Integrated Systems [SiS]: Unknown device 0645
00:02.0 ISA bridge: Silicon Integrated Systems [SiS]: Unknown device 0961
00:02.1 SMBus: Silicon Integrated Systems [SiS]: Unknown device 0016

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8 changes: 0 additions & 8 deletions trunk/Documentation/powerpc/booting-without-of.txt
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Expand Up @@ -880,10 +880,6 @@ address which can extend beyond that limit.
- device_type : Should be "soc"
- ranges : Should be defined as specified in 1) to describe the
translation of SOC addresses for memory mapped SOC registers.
- bus-frequency: Contains the bus frequency for the SOC node.
Typically, the value of this field is filled in by the boot
loader.


Recommended properties:

Expand Down Expand Up @@ -923,7 +919,6 @@ SOC.
device_type = "soc";
ranges = <00000000 e0000000 00100000>
reg = <e0000000 00003000>;
bus-frequency = <0>;
}


Expand Down Expand Up @@ -1175,8 +1170,6 @@ platforms are moved over to use the flattened-device-tree model.

mdio@24520 {
reg = <24520 20>;
device_type = "mdio";
compatible = "gianfar";

ethernet-phy@0 {
......
Expand Down Expand Up @@ -1324,7 +1317,6 @@ not necessary as they are usually the same as the root node.
device_type = "soc";
ranges = <00000000 e0000000 00100000>
reg = <e0000000 00003000>;
bus-frequency = <0>;

mdio@24520 {
reg = <24520 20>;
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23 changes: 6 additions & 17 deletions trunk/Documentation/spi/butterfly
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Expand Up @@ -12,20 +12,13 @@ You can make this adapter from an old printer cable and solder things
directly to the Butterfly. Or (if you have the parts and skills) you
can come up with something fancier, providing ciruit protection to the
Butterfly and the printer port, or with a better power supply than two
signal pins from the printer port. Or for that matter, you can use
similar cables to talk to many AVR boards, even a breadboard.

This is more powerful than "ISP programming" cables since it lets kernel
SPI protocol drivers interact with the AVR, and could even let the AVR
issue interrupts to them. Later, your protocol driver should work
easily with a "real SPI controller", instead of this bitbanger.
signal pins from the printer port.


The first cable connections will hook Linux up to one SPI bus, with the
AVR and a DataFlash chip; and to the AVR reset line. This is all you
need to reflash the firmware, and the pins are the standard Atmel "ISP"
connector pins (used also on non-Butterfly AVR boards). On the parport
side this is like "sp12" programming cables.
connector pins (used also on non-Butterfly AVR boards).

Signal Butterfly Parport (DB-25)
------ --------- ---------------
Expand All @@ -47,14 +40,10 @@ by clearing PORTB.[0-3]); (b) configure the mtd_dataflash driver; and
SELECT = J400.PB0/nSS = pin 17/C3,nSELECT
GND = J400.GND = pin 24/GND

Or you could flash firmware making the AVR into an SPI slave (keeping the
DataFlash in reset) and tweak the spi_butterfly driver to make it bind to
the driver for your custom SPI-based protocol.

The "USI" controller, using J405, can also be used for a second SPI bus.
That would let you talk to the AVR using custom SPI-with-USI firmware,
while letting either Linux or the AVR use the DataFlash. There are plenty
of spare parport pins to wire this one up, such as:
The "USI" controller, using J405, can be used for a second SPI bus. That
would let you talk to the AVR over SPI, running firmware that makes it act
as an SPI slave, while letting either Linux or the AVR use the DataFlash.
There are plenty of spare parport pins to wire this one up, such as:

Signal Butterfly Parport (DB-25)
------ --------- ---------------
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