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Blackfin arch: move HI/LO macros into blackfin.h and punt the rest of…
… macros.h as it includes VDSP macros we never use Signed-off-by: Mike Frysinger <michael.frysinger@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
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Mike Frysinger
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Bryan Wu
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Jun 11, 2007
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -1,95 +0,0 @@ | ||
| /************************************************************************ | ||
| * | ||
| * macros.h | ||
| * | ||
| * (c) Copyright 2001-2003 Analog Devices, Inc. All rights reserved. | ||
| * | ||
| ************************************************************************/ | ||
|
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||
| /* Defines various assembly macros. */ | ||
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| #ifndef _MACROS_H | ||
| #define _MACROS_H | ||
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| #define LO(con32) ((con32) & 0xFFFF) | ||
| #define lo(con32) ((con32) & 0xFFFF) | ||
| #define HI(con32) (((con32) >> 16) & 0xFFFF) | ||
| #define hi(con32) (((con32) >> 16) & 0xFFFF) | ||
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| /* | ||
| * Set the corresponding bits in a System Register (SR); | ||
| * All bits set in "mask" will be set in the system register | ||
| * specified by "sys_reg" bitset_SR(sys_reg, mask), where | ||
| * sys_reg is the system register and mask are the bits to be set. | ||
| */ | ||
| #define bitset_SR(sys_reg, mask)\ | ||
| [--SP] = (R7:6);\ | ||
| r7 = sys_reg;\ | ||
| r6.l = (mask) & 0xffff;\ | ||
| r6.h = (mask) >> 16;\ | ||
| r7 = r7 | r6;\ | ||
| sys_reg = r7;\ | ||
| csync;\ | ||
| (R7:6) = [SP++] | ||
|
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||
| /* | ||
| * Clear the corresponding bits in a System Register (SR); | ||
| * All bits set in "mask" will be cleared in the SR | ||
| * specified by "sys_reg" bitclr_SR(sys_reg, mask), where | ||
| * sys_reg is the SR and mask are the bits to be cleared. | ||
| */ | ||
| #define bitclr_SR(sys_reg, mask)\ | ||
| [--SP] = (R7:6);\ | ||
| r7 = sys_reg;\ | ||
| r7 =~ r7;\ | ||
| r6.l = (mask) & 0xffff;\ | ||
| r6.h = (mask) >> 16;\ | ||
| r7 = r7 | r6;\ | ||
| r7 =~ r7;\ | ||
| sys_reg = r7;\ | ||
| csync;\ | ||
| (R7:6) = [SP++] | ||
|
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||
| /* | ||
| * Set the corresponding bits in a Memory Mapped Register (MMR); | ||
| * All bits set in "mask" will be set in the MMR specified by "mmr_reg" | ||
| * bitset_MMR(mmr_reg, mask), where mmr_reg is the MMR and mask are | ||
| * the bits to be set. | ||
| */ | ||
| #define bitset_MMR(mmr_reg, mask)\ | ||
| [--SP] = (R7:6);\ | ||
| [--SP] = P5;\ | ||
| p5.l = mmr_reg & 0xffff;\ | ||
| p5.h = mmr_reg >> 16;\ | ||
| r7 = [p5];\ | ||
| r6.l = (mask) & 0xffff;\ | ||
| r6.h = (mask) >> 16;\ | ||
| r7 = r7 | r6;\ | ||
| [p5] = r7;\ | ||
| csync;\ | ||
| p5 = [SP++];\ | ||
| (R7:6) = [SP++] | ||
|
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| /* | ||
| * Clear the corresponding bits in a Memory Mapped Register (MMR); | ||
| * All bits set in "mask" will be cleared in the MMR specified by "mmr_reg" | ||
| * bitclr_MMRreg(mmr_reg, mask), where sys_reg is the MMR and mask are | ||
| * the bits to be cleared. | ||
| */ | ||
| #define bitclr_MMR(mmr_reg, mask)\ | ||
| [--SP] = (R7:6);\ | ||
| [--SP] = P5;\ | ||
| p5.l = mmr_reg & 0xffff;\ | ||
| p5.h = mmr_reg >> 16;\ | ||
| r7 = [p5];\ | ||
| r7 =~ r7;\ | ||
| r6.l = (mask) & 0xffff;\ | ||
| r6.h = (mask) >> 16;\ | ||
| r7 = r7 | r6;\ | ||
| r7 =~ r7;\ | ||
| [p5] = r7;\ | ||
| csync;\ | ||
| p5 = [SP++];\ | ||
| (R7:6) = [SP++] | ||
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| #endif /* _MACROS_H */ | ||