---

yaml
---
r: 355111
b: refs/heads/master
c: c1226ff
h: refs/heads/master
i:
  355109: 132c8d7
  355107: d214b54
  355103: 4470494
v: v3

[refs]

@@ -1,2 +1,2 @@
 ---
-refs/heads/master: c8d4bafe503ca767bbc8f3c54e4acd344ef26346
+refs/heads/master: c1226ff9af84dfa6ef73d95435748569c99b5171

trunk/MAINTAINERS

@@ -1262,6 +1262,14 @@ S:	Maintained
 F:	arch/arm/mach-pxa/z2.c
 F:	arch/arm/mach-pxa/include/mach/z2.h
 
+ARM/ZYNQ ARCHITECTURE
+M:	Michal Simek <michal.simek@xilinx.com>
+L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
+W:	http://wiki.xilinx.com
+T:	git git://git.xilinx.com/linux-xlnx.git
+S:	Supported
+F:	arch/arm/mach-zynq/
+
 ARM64 PORT (AARCH64 ARCHITECTURE)
 M:	Catalin Marinas <catalin.marinas@arm.com>
 M:	Will Deacon <will.deacon@arm.com>

trunk/arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts

@@ -70,7 +70,7 @@
 		compatible = "arm,sp805", "arm,primecell";
 		status = "disabled";
 		reg = <0 0x2b060000 0 0x1000>;
-		interrupts = <98>;
+		interrupts = <0 98 4>;
 		clocks = <&oscclk7>;
 		clock-names = "apb_pclk";
 	};

trunk/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts

@@ -72,7 +72,7 @@
 	wdt@2a490000 {
 		compatible = "arm,sp805", "arm,primecell";
 		reg = <0 0x2a490000 0 0x1000>;
-		interrupts = <98>;
+		interrupts = <0 98 4>;
 		clocks = <&oscclk6a>, <&oscclk6a>;
 		clock-names = "wdogclk", "apb_pclk";
 	};

trunk/arch/arm/mach-pxa/include/mach/palmtreo.h

@@ -38,13 +38,14 @@
 #define GPIO_NR_TREO_LCD_POWER	25
 
 /* Treo680 specific GPIOs */
-#ifdef CONFIG_MACH_TREO680
 #define GPIO_NR_TREO680_SD_READONLY	33
 #define GPIO_NR_TREO680_SD_POWER	42
 #define GPIO_NR_TREO680_VIBRATE_EN	44
 #define GPIO_NR_TREO680_KEYB_BL		24
 #define GPIO_NR_TREO680_BT_EN		43
-#endif /* CONFIG_MACH_TREO680 */
+#define GPIO_NR_TREO680_LCD_POWER	77
+#define GPIO_NR_TREO680_LCD_EN		86
+#define GPIO_NR_TREO680_LCD_EN_N	25
 
 /* Centro685 specific GPIOs */
 #define GPIO_NR_CENTRO_SD_POWER		21

trunk/arch/arm/mach-pxa/include/mach/smemc.h

@@ -37,6 +37,7 @@
 #define CSADRCFG1	(SMEMC_VIRT + 0x84)  /* Address Configuration Register for CS1 */
 #define CSADRCFG2	(SMEMC_VIRT + 0x88)  /* Address Configuration Register for CS2 */
 #define CSADRCFG3	(SMEMC_VIRT + 0x8C)  /* Address Configuration Register for CS3 */
+#define CSMSADRCFG	(SMEMC_VIRT + 0xA0)  /* Chip Select Configuration Register */
 
 /*
  * More handy macros for PCMCIA

trunk/arch/arm/mach-pxa/palmtreo.c

@@ -98,9 +98,6 @@ static unsigned long treo_pin_config[] __initdata = {
 	GPIO96_KP_MKOUT_6,
 	GPIO93_KP_DKIN_0 | WAKEUP_ON_LEVEL_HIGH,	/* Hotsync button */
 
-	/* LCD */
-	GPIOxx_LCD_TFT_16BPP,
-
 	/* Quick Capture Interface */
 	GPIO84_CIF_FV,
 	GPIO85_CIF_LV,
@@ -140,6 +137,12 @@ static unsigned long treo680_pin_config[] __initdata = {
 	/* MATRIX KEYPAD - different wake up source */
 	GPIO100_KP_MKIN_0 | WAKEUP_ON_LEVEL_HIGH,
 	GPIO99_KP_MKIN_5,
+
+	/* LCD... L_BIAS alt fn not configured on Treo680; is GPIO instead */
+	GPIOxx_LCD_16BPP,
+	GPIO74_LCD_FCLK,
+	GPIO75_LCD_LCLK,
+	GPIO76_LCD_PCLK,
 };
 #endif /* CONFIG_MACH_TREO680 */
 
@@ -155,6 +158,9 @@ static unsigned long centro685_pin_config[] __initdata = {
 	/* MATRIX KEYPAD - different wake up source */
 	GPIO100_KP_MKIN_0,
 	GPIO99_KP_MKIN_5 | WAKEUP_ON_LEVEL_HIGH,
+
+	/* LCD */
+	GPIOxx_LCD_TFT_16BPP,
 };
 #endif /* CONFIG_MACH_CENTRO */
 
@@ -328,7 +334,6 @@ static inline void palmtreo_uhc_init(void) {}
 /******************************************************************************
  * Vibra and LEDs
  ******************************************************************************/
-#ifdef CONFIG_MACH_TREO680
 static struct gpio_led treo680_gpio_leds[] = {
 	{
 		.name			= "treo680:vibra:vibra",
@@ -379,21 +384,17 @@ static struct gpio_led_platform_data centro_gpio_led_info = {
 static struct platform_device palmtreo_leds = {
 	.name   = "leds-gpio",
 	.id     = -1,
-	.dev    = {
-		.platform_data  = &treo680_gpio_led_info,
-	}
 };
 
 static void __init palmtreo_leds_init(void)
 {
 	if (machine_is_centro())
 		palmtreo_leds.dev.platform_data = &centro_gpio_led_info;
+	else if (machine_is_treo680())
+		palmtreo_leds.dev.platform_data = &treo680_gpio_led_info;
 
 	platform_device_register(&palmtreo_leds);
 }
-#else
-static inline void palmtreo_leds_init(void) {}
-#endif
 
 /******************************************************************************
  * Machine init
@@ -424,10 +425,59 @@ static void __init palmphone_common_init(void)
 }
 
 #ifdef CONFIG_MACH_TREO680
+void __init treo680_gpio_init(void)
+{
+	unsigned int gpio;
+
+	/* drive all three lcd gpios high initially */
+	const unsigned long lcd_flags = GPIOF_INIT_HIGH | GPIOF_DIR_OUT;
+
+	/*
+	 * LCD GPIO initialization...
+	 */
+
+	/*
+	 * This is likely the power to the lcd.  Toggling it low/high appears to
+	 * turn the lcd off/on.  Can be toggled after lcd is initialized without
+	 * any apparent adverse effects to the lcd operation.  Note that this
+	 * gpio line is used by the lcd controller as the L_BIAS signal, but
+	 * treo680 configures it as gpio.
+	 */
+	gpio = GPIO_NR_TREO680_LCD_POWER;
+	if (gpio_request_one(gpio, lcd_flags, "LCD power") < 0)
+		goto fail;
+
+	/*
+	 * These two are called "enables", for lack of a better understanding.
+	 * If either of these are toggled after the lcd is initialized, the
+	 * image becomes degraded.  N.B. The IPL shipped with the treo
+	 * configures GPIO_NR_TREO680_LCD_EN_N as output and drives it high.  If
+	 * the IPL is ever reprogrammed, this initialization may be need to be
+	 * revisited.
+	 */
+	gpio = GPIO_NR_TREO680_LCD_EN;
+	if (gpio_request_one(gpio, lcd_flags, "LCD enable") < 0)
+		goto fail;
+	gpio = GPIO_NR_TREO680_LCD_EN_N;
+	if (gpio_request_one(gpio, lcd_flags, "LCD enable_n") < 0)
+		goto fail;
+
+	/* driving this low turns LCD on */
+	gpio_set_value(GPIO_NR_TREO680_LCD_EN_N, 0);
+
+	return;
+ fail:
+	pr_err("gpio %d initialization failed\n", gpio);
+	gpio_free(GPIO_NR_TREO680_LCD_POWER);
+	gpio_free(GPIO_NR_TREO680_LCD_EN);
+	gpio_free(GPIO_NR_TREO680_LCD_EN_N);
+}
+
 static void __init treo680_init(void)
 {
 	pxa2xx_mfp_config(ARRAY_AND_SIZE(treo680_pin_config));
 	palmphone_common_init();
+	treo680_gpio_init();
 	palm27x_mmc_init(GPIO_NR_TREO_SD_DETECT_N, GPIO_NR_TREO680_SD_READONLY,
 			GPIO_NR_TREO680_SD_POWER, 0);
 }

trunk/arch/arm/mach-pxa/smemc.c

@@ -40,6 +40,8 @@ static void pxa3xx_smemc_resume(void)
 	__raw_writel(csadrcfg[1], CSADRCFG1);
 	__raw_writel(csadrcfg[2], CSADRCFG2);
 	__raw_writel(csadrcfg[3], CSADRCFG3);
+	/* CSMSADRCFG wakes up in its default state (0), so we need to set it */
+	__raw_writel(0x2, CSMSADRCFG);
 }
 
 static struct syscore_ops smemc_syscore_ops = {
@@ -49,8 +51,19 @@ static struct syscore_ops smemc_syscore_ops = {
 
 static int __init smemc_init(void)
 {
-	if (cpu_is_pxa3xx())
+	if (cpu_is_pxa3xx()) {
+		/*
+		 * The only documentation we have on the
+		 * Chip Select Configuration Register (CSMSADRCFG) is that
+		 * it must be programmed to 0x2.
+		 * Moreover, in the bit definitions, the second bit
+		 * (CSMSADRCFG[1]) is called "SETALWAYS".
+		 * Other bits are reserved in this register.
+		 */
+		__raw_writel(0x2, CSMSADRCFG);
+
 		register_syscore_ops(&smemc_syscore_ops);
+	}
 
 	return 0;
 }

trunk/arch/arm/mach-pxa/spitz.c

@@ -732,7 +732,7 @@ static inline void spitz_lcd_init(void) {}
 #endif
 
 /******************************************************************************
- * Framebuffer
+ * NAND Flash
  ******************************************************************************/
 #if defined(CONFIG_MTD_NAND_SHARPSL) || defined(CONFIG_MTD_NAND_SHARPSL_MODULE)
 static struct mtd_partition spitz_nand_partitions[] = {
@@ -858,7 +858,7 @@ static inline void spitz_nor_init(void) {}
 #endif
 
 /******************************************************************************
- * GPIO expander
+ * I2C devices
  ******************************************************************************/
 #if defined(CONFIG_I2C_PXA) || defined(CONFIG_I2C_PXA_MODULE)
 static struct pca953x_platform_data akita_pca953x_pdata = {