---

yaml --- r: 220313 b: refs/heads/master c: c11b0ef h: refs/heads/master i: 220311: 47ee192 v: v3
git-mirror · Oct 12, 2010 · e1cb946 · e1cb946
1 parent 7f87ab9
commit e1cb946
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Showing 4 changed files with 9 additions and 10 deletions.
diff --git a/[refs] b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 3c2c926823305139ef7867dcffa76b3a505a3b02
+refs/heads/master: c11b0ef8fe171f0b50999d61e401e4908980a774
diff --git a/trunk/drivers/staging/brcm80211/include/pci_core.h b/trunk/drivers/staging/brcm80211/include/pci_core.h
@@ -27,7 +27,7 @@
 #endif
 
 /* Sonics side: PCI core and host control registers */
-typedef struct sbpciregs {
+struct sbpciregs {
 	u32 control;		/* PCI control */
 	u32 PAD[3];
 	u32 arbcontrol;	/* PCI arbiter control */
@@ -52,7 +52,7 @@ typedef struct sbpciregs {
 	u32 pcicfg[4][64];	/* 0x400 - 0x7FF, PCI Cfg Space (>=rev8) */
 	u16 sprom[36];	/* SPROM shadow Area */
 	u32 PAD[46];
-} sbpciregs_t;
+};
 
 #endif				/* _LANGUAGE_ASSEMBLY */
 

diff --git a/trunk/drivers/staging/brcm80211/util/nicpci.c b/trunk/drivers/staging/brcm80211/util/nicpci.c
@@ -32,7 +32,7 @@
 typedef struct {
 	union {
 		sbpcieregs_t *pcieregs;
-		sbpciregs_t *pciregs;
+		struct sbpciregs *pciregs;
 	} regs;			/* Memory mapped register to the core */
 
 	si_t *sih;		/* System interconnect handle */
@@ -136,7 +136,7 @@ void *pcicore_init(si_t *sih, osl_t *osh, void *regs)
 		ASSERT(cap_ptr);
 		pi->pciecap_lcreg_offset = cap_ptr + PCIE_CAP_LINKCTRL_OFFSET;
 	} else
-		pi->regs.pciregs = (sbpciregs_t *) regs;
+		pi->regs.pciregs = (struct sbpciregs *) regs;
 
 	return pi;
 }

diff --git a/trunk/drivers/staging/brcm80211/util/siutils.c b/trunk/drivers/staging/brcm80211/util/siutils.c
@@ -1665,7 +1665,7 @@ void si_pci_down(si_t *sih)
 void si_pci_setup(si_t *sih, uint coremask)
 {
 	si_info_t *sii;
-	sbpciregs_t *pciregs = NULL;
+	struct sbpciregs *pciregs = NULL;
 	u32 siflag = 0, w;
 	uint idx = 0;
 
@@ -1685,8 +1685,7 @@ void si_pci_setup(si_t *sih, uint coremask)
 		siflag = si_flag(sih);
 
 		/* switch over to pci core */
-		pciregs =
-		    (sbpciregs_t *) si_setcoreidx(sih, sii->pub.buscoreidx);
+		pciregs = (struct sbpciregs *)si_setcoreidx(sih, sii->pub.buscoreidx);
 	}
 
 	/*
@@ -1727,7 +1726,7 @@ void si_pci_setup(si_t *sih, uint coremask)
 int si_pci_fixcfg(si_t *sih)
 {
 	uint origidx, pciidx;
-	sbpciregs_t *pciregs = NULL;
+	struct sbpciregs *pciregs = NULL;
 	sbpcieregs_t *pcieregs = NULL;
 	void *regs = NULL;
 	u16 val16, *reg16 = NULL;
@@ -1748,7 +1747,7 @@ int si_pci_fixcfg(si_t *sih)
 		ASSERT(pcieregs != NULL);
 		reg16 = &pcieregs->sprom[SRSH_PI_OFFSET];
 	} else if (sii->pub.buscoretype == PCI_CORE_ID) {
-		pciregs = (sbpciregs_t *) si_setcore(&sii->pub, PCI_CORE_ID, 0);
+		pciregs = (struct sbpciregs *)si_setcore(&sii->pub, PCI_CORE_ID, 0);
 		regs = pciregs;
 		ASSERT(pciregs != NULL);
 		reg16 = &pciregs->sprom[SRSH_PI_OFFSET];