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spi_bfin: wait for tx to complete on some cs_chg paths
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PBX 2 SPI devices need the nonstandard "cs change per word" mechanism.

This patch is one of three updating this driver to make the last data bits get
sent before advancing the transfer ...  in this case, before the chipselect
gets deactivated.

Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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Bryan Wu authored and Linus Torvalds committed Feb 6, 2008
1 parent aab0d83 commit e26aa01
Showing 1 changed file with 12 additions and 28 deletions.
40 changes: 12 additions & 28 deletions drivers/spi/spi_bfin5xx.c
Original file line number Diff line number Diff line change
Expand Up @@ -294,16 +294,14 @@ static void u8_cs_chg_writer(struct driver_data *drv_data)
{
struct chip_data *chip = drv_data->cur_chip;

/* poll for SPI completion before start */
while (!(read_STAT(drv_data) & BIT_STAT_SPIF))
cpu_relax();

while (drv_data->tx < drv_data->tx_end) {
cs_active(drv_data, chip);

write_TDBR(drv_data, (*(u8 *) (drv_data->tx)));
while (read_STAT(drv_data) & BIT_STAT_TXS)
cpu_relax();
while (!(read_STAT(drv_data) & BIT_STAT_SPIF))
cpu_relax();

cs_deactive(drv_data, chip);

Expand Down Expand Up @@ -342,31 +340,20 @@ static void u8_cs_chg_reader(struct driver_data *drv_data)
{
struct chip_data *chip = drv_data->cur_chip;

/* poll for SPI completion before start */
while (!(read_STAT(drv_data) & BIT_STAT_SPIF))
cpu_relax();

/* clear TDBR buffer before read(else it will be shifted out) */
write_TDBR(drv_data, 0xFFFF);
while (drv_data->rx < drv_data->rx_end) {
cs_active(drv_data, chip);
read_RDBR(drv_data); /* kick off */

cs_active(drv_data, chip);
dummy_read(drv_data);
while (!(read_STAT(drv_data) & BIT_STAT_RXS))
cpu_relax();
while (!(read_STAT(drv_data) & BIT_STAT_SPIF))
cpu_relax();

while (drv_data->rx < drv_data->rx_end - 1) {
*(u8 *) (drv_data->rx) = read_SHAW(drv_data);
cs_deactive(drv_data, chip);

while (!(read_STAT(drv_data) & BIT_STAT_RXS))
cpu_relax();
cs_active(drv_data, chip);
*(u8 *) (drv_data->rx) = read_RDBR(drv_data);
++drv_data->rx;
}
cs_deactive(drv_data, chip);

while (!(read_STAT(drv_data) & BIT_STAT_RXS))
cpu_relax();
*(u8 *) (drv_data->rx) = read_SHAW(drv_data);
++drv_data->rx;
}

static void u8_duplex(struct driver_data *drv_data)
Expand All @@ -392,15 +379,12 @@ static void u8_cs_chg_duplex(struct driver_data *drv_data)
{
struct chip_data *chip = drv_data->cur_chip;

/* poll for SPI completion before start */
while (!(read_STAT(drv_data) & BIT_STAT_SPIF))
cpu_relax();

while (drv_data->rx < drv_data->rx_end) {
cs_active(drv_data, chip);

write_TDBR(drv_data, (*(u8 *) (drv_data->tx)));
while (read_STAT(drv_data) & BIT_STAT_TXS)

while (!(read_STAT(drv_data) & BIT_STAT_SPIF))
cpu_relax();
while (!(read_STAT(drv_data) & BIT_STAT_RXS))
cpu_relax();
Expand Down

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