---

yaml --- r: 14323 b: refs/heads/master c: bdc3c3c h: refs/heads/master i: 14321: b43c1dc 14319: e4bdebb v: v3
git-mirror · Nov 17, 2005 · e2beeb6 · e2beeb6
1 parent 94fecdb
commit e2beeb6
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Showing 5 changed files with 20 additions and 1 deletion.
diff --git a/[refs] b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 6f17ce33fef3fd84e3e45850c9388d118adfad96
+refs/heads/master: bdc3c3c7cbc3e1244c03640b4b372d097a1dacf3
diff --git a/trunk/include/asm-mips/mach-db1x00/db1200.h b/trunk/include/asm-mips/mach-db1x00/db1200.h
@@ -220,5 +220,8 @@ static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
 #define BOARD_PC1_INT DB1200_PC1_INT
 #define BOARD_CARD_INSERTED(SOCKET) bcsr->sig_status & (1<<(8+(2*SOCKET)))
 
+/* Nand chip select */
+#define NAND_CS 1
+
 #endif /* __ASM_DB1200_H */
 
diff --git a/trunk/include/asm-mips/mach-db1x00/db1x00.h b/trunk/include/asm-mips/mach-db1x00/db1x00.h
@@ -200,6 +200,12 @@ typedef volatile struct
 			((NAND_T_PUL & 0xF)	<< NAND_T_PUL_SHIFT) | \
 			((NAND_T_SU  & 0xF)	<< NAND_T_SU_SHIFT)  | \
 			((NAND_T_WH  & 0xF)	<< NAND_T_WH_SHIFT)
+#define NAND_CS 1
+
+/* should be done by yamon */
+#define NAND_STCFG  0x00400005 /* 8-bit NAND */
+#define NAND_STTIME 0x00007774 /* valid for 396MHz SD=2 only */
+#define NAND_STADDR 0x12000FFF /* physical address 0x20000000 */
 
 #endif /* __ASM_DB1X00_H */
 
diff --git a/trunk/include/asm-mips/mach-pb1x00/pb1200.h b/trunk/include/asm-mips/mach-pb1x00/pb1200.h
@@ -248,5 +248,8 @@ static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
 #define BOARD_PC1_INT PB1200_PC1_INT
 #define BOARD_CARD_INSERTED(SOCKET) bcsr->sig_status & (1<<(8+(2*SOCKET)))
 
+/* Nand chip select */
+#define NAND_CS 1
+
 #endif /* __ASM_PB1200_H */
 
diff --git a/trunk/include/asm-mips/mach-pb1x00/pb1550.h b/trunk/include/asm-mips/mach-pb1x00/pb1550.h
@@ -166,4 +166,11 @@ static BCSR * const bcsr = (BCSR *)BCSR_PHYS_ADDR;
 			((NAND_T_SU  & 0xF)	<< NAND_T_SU_SHIFT)  | \
 			((NAND_T_WH  & 0xF)	<< NAND_T_WH_SHIFT)
 
+#define NAND_CS 1
+
+/* should be done by yamon */
+#define NAND_STCFG  0x00400005 /* 8-bit NAND */
+#define NAND_STTIME 0x00007774 /* valid for 396MHz SD=2 only */
+#define NAND_STADDR 0x12000FFF /* physical address 0x20000000 */
+
 #endif /* __ASM_PB1550_H */