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ARM: dts: AM33XX: Add support for IGEP COM AQUILA
The IGEP COM AQUILA is industrial processors SODIMM module with following highlights: o AM3352/AM3354/AM3358/AM3359 Texas Instruments processor o Cortex-A8 ARM CPU o 3.3 volts Inputs / Outputs use industrial o 256 MB DDR3 SDRAM / 128 Megabytes FLASH o MicroSD card reader on-board o Ethernet controller on-board o JTAG debug connector available o Designed for industrial range purposes Signed-off-by: Enric Balletbo i Serra <eballetbo@iseebcn.com> Reviewed-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
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Enric Balletbo i Serra
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Benoit Cousson
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Oct 11, 2013
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/* | ||
* am335x-igep0033.dtsi - Device Tree file for IGEP COM AQUILA AM335x | ||
* | ||
* Copyright (C) 2013 ISEE 2007 SL - http://www.isee.biz | ||
* | ||
* This program is free software; you can redistribute it and/or modify | ||
* it under the terms of the GNU General Public License version 2 as | ||
* published by the Free Software Foundation. | ||
*/ | ||
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/dts-v1/; | ||
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#include "am33xx.dtsi" | ||
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/ { | ||
cpus { | ||
cpu@0 { | ||
cpu0-supply = <&vdd1_reg>; | ||
}; | ||
}; | ||
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memory { | ||
device_type = "memory"; | ||
reg = <0x80000000 0x10000000>; /* 256 MB */ | ||
}; | ||
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leds { | ||
pinctrl-names = "default"; | ||
pinctrl-0 = <&leds_pins>; | ||
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compatible = "gpio-leds"; | ||
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led@0 { | ||
label = "com:green:user"; | ||
gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>; | ||
default-state = "on"; | ||
}; | ||
}; | ||
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vbat: fixedregulator@0 { | ||
compatible = "regulator-fixed"; | ||
regulator-name = "vbat"; | ||
regulator-min-microvolt = <5000000>; | ||
regulator-max-microvolt = <5000000>; | ||
regulator-boot-on; | ||
}; | ||
}; | ||
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&am33xx_pinmux { | ||
i2c0_pins: pinmux_i2c0_pins { | ||
pinctrl-single,pins = < | ||
0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */ | ||
0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */ | ||
>; | ||
}; | ||
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nandflash_pins: pinmux_nandflash_pins { | ||
pinctrl-single,pins = < | ||
0x0 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */ | ||
0x4 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */ | ||
0x8 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */ | ||
0xc (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */ | ||
0x10 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */ | ||
0x14 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */ | ||
0x18 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */ | ||
0x1c (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */ | ||
0x70 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */ | ||
0x74 (PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.gpio0_30 */ | ||
0x7c (PIN_OUTPUT | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */ | ||
0x90 (PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */ | ||
0x94 (PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */ | ||
0x98 (PIN_OUTPUT | MUX_MODE0) /* gpmc_wen.gpmc_wen */ | ||
0x9c (PIN_OUTPUT | MUX_MODE0) /* gpmc_be0n_cle.gpmc_be0n_cle */ | ||
>; | ||
}; | ||
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uart0_pins: pinmux_uart0_pins { | ||
pinctrl-single,pins = < | ||
0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */ | ||
0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */ | ||
>; | ||
}; | ||
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leds_pins: pinmux_leds_pins { | ||
pinctrl-single,pins = < | ||
0x5c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a7.gpio1_23 */ | ||
>; | ||
}; | ||
}; | ||
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&cpsw_emac0 { | ||
phy_id = <&davinci_mdio>, <0>; | ||
}; | ||
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&cpsw_emac1 { | ||
phy_id = <&davinci_mdio>, <1>; | ||
}; | ||
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&elm { | ||
status = "okay"; | ||
}; | ||
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&gpmc { | ||
status = "okay"; | ||
pinctrl-names = "default"; | ||
pinctrl-0 = <&nandflash_pins>; | ||
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ranges = <0 0 0x08000000 0x10000000>; /* CS0: NAND */ | ||
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nand@0,0 { | ||
reg = <0 0 0>; /* CS0, offset 0 */ | ||
nand-bus-width = <8>; | ||
ti,nand-ecc-opt = "bch8"; | ||
gpmc,device-nand = "true"; | ||
gpmc,device-width = <1>; | ||
gpmc,sync-clk-ps = <0>; | ||
gpmc,cs-on-ns = <0>; | ||
gpmc,cs-rd-off-ns = <44>; | ||
gpmc,cs-wr-off-ns = <44>; | ||
gpmc,adv-on-ns = <6>; | ||
gpmc,adv-rd-off-ns = <34>; | ||
gpmc,adv-wr-off-ns = <44>; | ||
gpmc,we-on-ns = <0>; | ||
gpmc,we-off-ns = <40>; | ||
gpmc,oe-on-ns = <0>; | ||
gpmc,oe-off-ns = <54>; | ||
gpmc,access-ns = <64>; | ||
gpmc,rd-cycle-ns = <82>; | ||
gpmc,wr-cycle-ns = <82>; | ||
gpmc,wait-on-read = "true"; | ||
gpmc,wait-on-write = "true"; | ||
gpmc,bus-turnaround-ns = <0>; | ||
gpmc,cycle2cycle-delay-ns = <0>; | ||
gpmc,clk-activation-ns = <0>; | ||
gpmc,wait-monitoring-ns = <0>; | ||
gpmc,wr-access-ns = <40>; | ||
gpmc,wr-data-mux-bus-ns = <0>; | ||
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#address-cells = <1>; | ||
#size-cells = <1>; | ||
elm_id = <&elm>; | ||
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/* MTD partition table */ | ||
partition@0 { | ||
label = "SPL"; | ||
reg = <0x00000000 0x000080000>; | ||
}; | ||
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partition@1 { | ||
label = "U-boot"; | ||
reg = <0x00080000 0x001e0000>; | ||
}; | ||
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partition@2 { | ||
label = "U-Boot Env"; | ||
reg = <0x00260000 0x00020000>; | ||
}; | ||
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partition@3 { | ||
label = "Kernel"; | ||
reg = <0x00280000 0x00500000>; | ||
}; | ||
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partition@4 { | ||
label = "File System"; | ||
reg = <0x00780000 0x007880000>; | ||
}; | ||
}; | ||
}; | ||
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&i2c0 { | ||
status = "okay"; | ||
pinctrl-names = "default"; | ||
pinctrl-0 = <&i2c0_pins>; | ||
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clock-frequency = <400000>; | ||
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tps: tps@2d { | ||
reg = <0x2d>; | ||
}; | ||
}; | ||
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&uart0 { | ||
status = "okay"; | ||
pinctrl-names = "default"; | ||
pinctrl-0 = <&uart0_pins>; | ||
}; | ||
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#include "tps65910.dtsi" | ||
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&tps { | ||
vcc1-supply = <&vbat>; | ||
vcc2-supply = <&vbat>; | ||
vcc3-supply = <&vbat>; | ||
vcc4-supply = <&vbat>; | ||
vcc5-supply = <&vbat>; | ||
vcc6-supply = <&vbat>; | ||
vcc7-supply = <&vbat>; | ||
vccio-supply = <&vbat>; | ||
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regulators { | ||
vrtc_reg: regulator@0 { | ||
regulator-always-on; | ||
}; | ||
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vio_reg: regulator@1 { | ||
regulator-always-on; | ||
}; | ||
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vdd1_reg: regulator@2 { | ||
/* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */ | ||
regulator-name = "vdd_mpu"; | ||
regulator-min-microvolt = <912500>; | ||
regulator-max-microvolt = <1312500>; | ||
regulator-boot-on; | ||
regulator-always-on; | ||
}; | ||
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vdd2_reg: regulator@3 { | ||
/* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */ | ||
regulator-name = "vdd_core"; | ||
regulator-min-microvolt = <912500>; | ||
regulator-max-microvolt = <1150000>; | ||
regulator-boot-on; | ||
regulator-always-on; | ||
}; | ||
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vdd3_reg: regulator@4 { | ||
regulator-always-on; | ||
}; | ||
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vdig1_reg: regulator@5 { | ||
regulator-always-on; | ||
}; | ||
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vdig2_reg: regulator@6 { | ||
regulator-always-on; | ||
}; | ||
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vpll_reg: regulator@7 { | ||
regulator-always-on; | ||
}; | ||
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vdac_reg: regulator@8 { | ||
regulator-always-on; | ||
}; | ||
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vaux1_reg: regulator@9 { | ||
regulator-always-on; | ||
}; | ||
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vaux2_reg: regulator@10 { | ||
regulator-always-on; | ||
}; | ||
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vaux33_reg: regulator@11 { | ||
regulator-always-on; | ||
}; | ||
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vmmc_reg: regulator@12 { | ||
regulator-always-on; | ||
}; | ||
}; | ||
}; | ||
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