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r: 69393
b: refs/heads/master
c: f2e1d89
h: refs/heads/master
i:
  69391: abe9a19
v: v3
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Linus Torvalds committed Oct 15, 2007
1 parent 3e7da79 commit e46d1df
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Showing 1,083 changed files with 64,558 additions and 42,551 deletions.
2 changes: 1 addition & 1 deletion [refs]
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@@ -1,2 +1,2 @@
---
refs/heads/master: 82ba56c273911f7eda79849cfa0fc2d2e5a3b75b
refs/heads/master: f2e1d89f9b349b3cd914b7c6ec6368632f4ad048
2 changes: 1 addition & 1 deletion trunk/Documentation/DocBook/deviceiobook.tmpl
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Expand Up @@ -316,7 +316,7 @@ CPU B: spin_unlock_irqrestore(&dev_lock, flags)

<chapter id="pubfunctions">
<title>Public Functions Provided</title>
!Iinclude/asm-i386/io.h
!Iinclude/asm-x86/io_32.h
!Elib/iomap.c
</chapter>

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18 changes: 9 additions & 9 deletions trunk/Documentation/DocBook/kernel-api.tmpl
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Expand Up @@ -45,8 +45,8 @@
</sect1>

<sect1><title>Atomic and pointer manipulation</title>
!Iinclude/asm-i386/atomic.h
!Iinclude/asm-i386/unaligned.h
!Iinclude/asm-x86/atomic_32.h
!Iinclude/asm-x86/unaligned_32.h
</sect1>

<sect1><title>Delaying, scheduling, and timer routines</title>
Expand Down Expand Up @@ -119,7 +119,7 @@ X!Ilib/string.c
!Elib/string.c
</sect1>
<sect1><title>Bit Operations</title>
!Iinclude/asm-i386/bitops.h
!Iinclude/asm-x86/bitops_32.h
</sect1>
</chapter>

Expand Down Expand Up @@ -155,8 +155,8 @@ X!Ilib/string.c
!Emm/slab.c
</sect1>
<sect1><title>User Space Memory Access</title>
!Iinclude/asm-i386/uaccess.h
!Earch/i386/lib/usercopy.c
!Iinclude/asm-x86/uaccess_32.h
!Earch/x86/lib/usercopy_32.c
</sect1>
<sect1><title>More Memory Management Functions</title>
!Emm/readahead.c
Expand Down Expand Up @@ -293,7 +293,7 @@ X!Ekernel/module.c
</sect1>

<sect1><title>MTRR Handling</title>
!Earch/i386/kernel/cpu/mtrr/main.c
!Earch/x86/kernel/cpu/mtrr/main.c
</sect1>

<sect1><title>PCI Support Library</title>
Expand All @@ -316,14 +316,14 @@ X!Edrivers/pci/hotplug.c
<sect1><title>MCA Architecture</title>
<sect2><title>MCA Device Functions</title>
<para>
Refer to the file arch/i386/kernel/mca.c for more information.
Refer to the file arch/x86/kernel/mca_32.c for more information.
</para>
<!-- FIXME: Removed for now since no structured comments in source
X!Earch/i386/kernel/mca.c
X!Earch/x86/kernel/mca_32.c
-->
</sect2>
<sect2><title>MCA Bus DMA</title>
!Iinclude/asm-i386/mca_dma.h
!Iinclude/asm-x86/mca_dma.h
</sect2>
</sect1>
</chapter>
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4 changes: 2 additions & 2 deletions trunk/Documentation/DocBook/kernel-hacking.tmpl
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Expand Up @@ -1239,7 +1239,7 @@ static struct block_device_operations opt_fops = {
</para>

<para>
<filename>include/asm-i386/delay.h:</filename>
<filename>include/asm-x86/delay_32.h:</filename>
</para>
<programlisting>
#define ndelay(n) (__builtin_constant_p(n) ? \
Expand All @@ -1265,7 +1265,7 @@ static struct block_device_operations opt_fops = {
</programlisting>

<para>
<filename>include/asm-i386/uaccess.h:</filename>
<filename>include/asm-x86/uaccess_32.h:</filename>
</para>

<programlisting>
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2 changes: 1 addition & 1 deletion trunk/Documentation/DocBook/mcabook.tmpl
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Expand Up @@ -101,7 +101,7 @@

<chapter id="dmafunctions">
<title>DMA Functions Provided</title>
!Iinclude/asm-i386/mca_dma.h
!Iinclude/asm-x86/mca_dma.h
</chapter>

</book>
5 changes: 1 addition & 4 deletions trunk/Documentation/DocBook/mtdnand.tmpl
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Expand Up @@ -275,16 +275,13 @@ int __init board_init (void)
int err = 0;

/* Allocate memory for MTD device structure and private data */
board_mtd = kmalloc (sizeof(struct mtd_info) + sizeof (struct nand_chip), GFP_KERNEL);
board_mtd = kzalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip), GFP_KERNEL);
if (!board_mtd) {
printk ("Unable to allocate NAND MTD device structure.\n");
err = -ENOMEM;
goto out;
}

/* Initialize structures */
memset ((char *) board_mtd, 0, sizeof(struct mtd_info) + sizeof(struct nand_chip));

/* map physical adress */
baseaddr = (unsigned long)ioremap(CHIP_PHYSICAL_ADDRESS, 1024);
if(!baseaddr){
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2 changes: 1 addition & 1 deletion trunk/Documentation/hwmon/coretemp
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Expand Up @@ -4,7 +4,7 @@ Kernel driver coretemp
Supported chips:
* All Intel Core family
Prefix: 'coretemp'
CPUID: family 0x6, models 0xe, 0xf
CPUID: family 0x6, models 0xe, 0xf, 0x16
Datasheet: Intel 64 and IA-32 Architectures Software Developer's Manual
Volume 3A: System Programming Guide

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33 changes: 23 additions & 10 deletions trunk/Documentation/hwmon/dme1737
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Expand Up @@ -6,6 +6,10 @@ Supported chips:
Prefix: 'dme1737'
Addresses scanned: I2C 0x2c, 0x2d, 0x2e
Datasheet: Provided by SMSC upon request and under NDA
* SMSC SCH3112, SCH3114, SCH3116
Prefix: 'sch311x'
Addresses scanned: none, address read from Super-I/O config space
Datasheet: http://www.nuhorizons.com/FeaturedProducts/Volume1/SMSC/311x.pdf

Authors:
Juerg Haefliger <juergh@gmail.com>
Expand All @@ -27,16 +31,25 @@ Description
-----------

This driver implements support for the hardware monitoring capabilities of the
SMSC DME1737 and Asus A8000 (which are the same) Super-I/O chips. This chip
features monitoring of 3 temp sensors temp[1-3] (2 remote diodes and 1
internal), 7 voltages in[0-6] (6 external and 1 internal) and 6 fan speeds
fan[1-6]. Additionally, the chip implements 5 PWM outputs pwm[1-3,5-6] for
controlling fan speeds both manually and automatically.

Fan[3-6] and pwm[3,5-6] are optional features and their availability is
dependent on the configuration of the chip. The driver will detect which
features are present during initialization and create the sysfs attributes
accordingly.
SMSC DME1737 and Asus A8000 (which are the same) and SMSC SCH311x Super-I/O
chips. These chips feature monitoring of 3 temp sensors temp[1-3] (2 remote
diodes and 1 internal), 7 voltages in[0-6] (6 external and 1 internal) and up
to 6 fan speeds fan[1-6]. Additionally, the chips implement up to 5 PWM
outputs pwm[1-3,5-6] for controlling fan speeds both manually and
automatically.

For the DME1737 and A8000, fan[1-2] and pwm[1-2] are always present. Fan[3-6]
and pwm[3,5-6] are optional features and their availability depends on the
configuration of the chip. The driver will detect which features are present
during initialization and create the sysfs attributes accordingly.

For the SCH311x, fan[1-3] and pwm[1-3] are always present and fan[4-6] and
pwm[5-6] don't exist.

The hardware monitoring features of the DME1737 and A8000 are only accessible
via SMBus, while the SCH311x only provides access via the ISA bus. The driver
will therefore register itself as an I2C client driver if it detects a DME1737
or A8000 and as a platform driver if it detects a SCH311x chip.


Voltage Monitoring
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7 changes: 7 additions & 0 deletions trunk/Documentation/hwmon/f71805f
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Expand Up @@ -6,6 +6,10 @@ Supported chips:
Prefix: 'f71805f'
Addresses scanned: none, address read from Super I/O config space
Datasheet: Available from the Fintek website
* Fintek F71806F/FG
Prefix: 'f71872f'
Addresses scanned: none, address read from Super I/O config space
Datasheet: Available from the Fintek website
* Fintek F71872F/FG
Prefix: 'f71872f'
Addresses scanned: none, address read from Super I/O config space
Expand Down Expand Up @@ -38,6 +42,9 @@ The Fintek F71872F/FG Super I/O chip is almost the same, with two
additional internal voltages monitored (VSB and battery). It also features
6 VID inputs. The VID inputs are not yet supported by this driver.

The Fintek F71806F/FG Super-I/O chip is essentially the same as the
F71872F/FG, and is undistinguishable therefrom.

The driver assumes that no more than one chip is present, which seems
reasonable.

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3 changes: 2 additions & 1 deletion trunk/Documentation/hwmon/it87
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Expand Up @@ -90,7 +90,8 @@ upper VID bits share their pins with voltage inputs (in5 and in6) so you
can't have both on a given board.

The IT8716F, IT8718F and later IT8712F revisions have support for
2 additional fans. They are not yet supported by the driver.
2 additional fans. They are supported by the driver for the IT8716F and
IT8718F but not for the IT8712F

The IT8716F and IT8718F, and late IT8712F and IT8705F also have optional
16-bit tachometer counters for fans 1 to 3. This is better (no more fan
Expand Down
10 changes: 0 additions & 10 deletions trunk/Documentation/hwmon/lm78
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Expand Up @@ -56,16 +56,6 @@ should work with. This is hardcoded by the mainboard and/or processor itself.
It is a value in volts. When it is unconnected, you will often find the
value 3.50 V here.

In addition to the alarms described above, there are a couple of additional
ones. There is a BTI alarm, which gets triggered when an external chip has
crossed its limits. Usually, this is connected to all LM75 chips; if at
least one crosses its limits, this bit gets set. The CHAS alarm triggers
if your computer case is open. The FIFO alarms should never trigger; it
indicates an internal error. The SMI_IN alarm indicates some other chip
has triggered an SMI interrupt. As we do not use SMI interrupts at all,
this condition usually indicates there is a problem with some other
device.

If an alarm triggers, it will remain triggered until the hardware register
is read at least once. This means that the cause for the alarm may
already have disappeared! Note that in the current implementation, all
Expand Down
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