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yaml
---
r: 197103
b: refs/heads/master
c: 48d9356
h: refs/heads/master
i:
  197101: 150c474
  197099: 890cbc6
  197095: 0e8aba2
  197087: dc3a795
v: v3
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Martyn Welch authored and Greg Kroah-Hartman committed May 11, 2010
1 parent 0a75f94 commit e51f971
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Showing 3 changed files with 172 additions and 127 deletions.
2 changes: 1 addition & 1 deletion [refs]
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Original file line number Diff line number Diff line change
@@ -1,2 +1,2 @@
---
refs/heads/master: ebbfda1e656b9dd69bd606b1dbba28cd53dd227e
refs/heads/master: 48d9356e7750d3efa3156eb3a76e7a4439774b12
95 changes: 57 additions & 38 deletions trunk/drivers/staging/vme/bridges/vme_ca91cx42.c
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Original file line number Diff line number Diff line change
Expand Up @@ -94,31 +94,35 @@ static u32 ca91cx42_IACK_irqhandler(struct ca91cx42_driver *bridge)
return CA91CX42_LINT_SW_IACK;
}

static u32 ca91cx42_VERR_irqhandler(struct ca91cx42_driver *bridge)
static u32 ca91cx42_VERR_irqhandler(struct vme_bridge *ca91cx42_bridge)
{
int val;
struct ca91cx42_driver *bridge;

bridge = ca91cx42_bridge->driver_priv;

val = ioread32(bridge->base + DGCS);

if (!(val & 0x00000800)) {
printk(KERN_ERR "ca91c042: ca91cx42_VERR_irqhandler DMA Read "
"Error DGCS=%08X\n", val);
dev_err(ca91cx42_bridge->parent, "ca91cx42_VERR_irqhandler DMA "
"Read Error DGCS=%08X\n", val);
}

return CA91CX42_LINT_VERR;
}

static u32 ca91cx42_LERR_irqhandler(struct ca91cx42_driver *bridge)
static u32 ca91cx42_LERR_irqhandler(struct vme_bridge *ca91cx42_bridge)
{
int val;
struct ca91cx42_driver *bridge;

val = ioread32(bridge->base + DGCS);
bridge = ca91cx42_bridge->driver_priv;

if (!(val & 0x00000800)) {
printk(KERN_ERR "ca91c042: ca91cx42_LERR_irqhandler DMA Read "
"Error DGCS=%08X\n", val);
val = ioread32(bridge->base + DGCS);

}
if (!(val & 0x00000800))
dev_err(ca91cx42_bridge->parent, "ca91cx42_LERR_irqhandler DMA "
"Read Error DGCS=%08X\n", val);

return CA91CX42_LINT_LERR;
}
Expand Down Expand Up @@ -176,9 +180,9 @@ static irqreturn_t ca91cx42_irqhandler(int irq, void *ptr)
if (stat & CA91CX42_LINT_SW_IACK)
serviced |= ca91cx42_IACK_irqhandler(bridge);
if (stat & CA91CX42_LINT_VERR)
serviced |= ca91cx42_VERR_irqhandler(bridge);
serviced |= ca91cx42_VERR_irqhandler(ca91cx42_bridge);
if (stat & CA91CX42_LINT_LERR)
serviced |= ca91cx42_LERR_irqhandler(bridge);
serviced |= ca91cx42_LERR_irqhandler(ca91cx42_bridge);
if (stat & (CA91CX42_LINT_VIRQ1 | CA91CX42_LINT_VIRQ2 |
CA91CX42_LINT_VIRQ3 | CA91CX42_LINT_VIRQ4 |
CA91CX42_LINT_VIRQ5 | CA91CX42_LINT_VIRQ6 |
Expand Down Expand Up @@ -326,9 +330,12 @@ int ca91cx42_slave_set(struct vme_slave_resource *image, int enabled,
unsigned int i, addr = 0, granularity;
unsigned int temp_ctl = 0;
unsigned int vme_bound, pci_offset;
struct vme_bridge *ca91cx42_bridge;
struct ca91cx42_driver *bridge;

bridge = image->parent->driver_priv;
ca91cx42_bridge = image->parent;

bridge = ca91cx42_bridge->driver_priv;

i = image->number;

Expand All @@ -353,7 +360,7 @@ int ca91cx42_slave_set(struct vme_slave_resource *image, int enabled,
case VME_USER3:
case VME_USER4:
default:
printk(KERN_ERR "Invalid address space\n");
dev_err(ca91cx42_bridge->parent, "Invalid address space\n");
return -EINVAL;
break;
}
Expand All @@ -371,15 +378,18 @@ int ca91cx42_slave_set(struct vme_slave_resource *image, int enabled,
granularity = 0x10000;

if (vme_base & (granularity - 1)) {
printk(KERN_ERR "Invalid VME base alignment\n");
dev_err(ca91cx42_bridge->parent, "Invalid VME base "
"alignment\n");
return -EINVAL;
}
if (vme_bound & (granularity - 1)) {
printk(KERN_ERR "Invalid VME bound alignment\n");
dev_err(ca91cx42_bridge->parent, "Invalid VME bound "
"alignment\n");
return -EINVAL;
}
if (pci_offset & (granularity - 1)) {
printk(KERN_ERR "Invalid PCI Offset alignment\n");
dev_err(ca91cx42_bridge->parent, "Invalid PCI Offset "
"alignment\n");
return -EINVAL;
}

Expand Down Expand Up @@ -491,7 +501,7 @@ static int ca91cx42_alloc_resource(struct vme_master_resource *image,

/* Find pci_dev container of dev */
if (ca91cx42_bridge->parent == NULL) {
printk(KERN_ERR "Dev entry NULL\n");
dev_err(ca91cx42_bridge->parent, "Dev entry NULL\n");
return -EINVAL;
}
pdev = container_of(ca91cx42_bridge->parent, struct pci_dev, dev);
Expand All @@ -515,8 +525,8 @@ static int ca91cx42_alloc_resource(struct vme_master_resource *image,
if (image->bus_resource.name == NULL) {
image->bus_resource.name = kmalloc(VMENAMSIZ+3, GFP_KERNEL);
if (image->bus_resource.name == NULL) {
printk(KERN_ERR "Unable to allocate memory for resource"
" name\n");
dev_err(ca91cx42_bridge->parent, "Unable to allocate "
"memory for resource name\n");
retval = -ENOMEM;
goto err_name;
}
Expand All @@ -533,8 +543,8 @@ static int ca91cx42_alloc_resource(struct vme_master_resource *image,
&(image->bus_resource), size, size, PCIBIOS_MIN_MEM,
0, NULL, NULL);
if (retval) {
printk(KERN_ERR "Failed to allocate mem resource for "
"window %d size 0x%lx start 0x%lx\n",
dev_err(ca91cx42_bridge->parent, "Failed to allocate mem "
"resource for window %d size 0x%lx start 0x%lx\n",
image->number, (unsigned long)size,
(unsigned long)image->bus_resource.start);
goto err_resource;
Expand All @@ -543,7 +553,7 @@ static int ca91cx42_alloc_resource(struct vme_master_resource *image,
image->kern_base = ioremap_nocache(
image->bus_resource.start, size);
if (image->kern_base == NULL) {
printk(KERN_ERR "Failed to remap resource\n");
dev_err(ca91cx42_bridge->parent, "Failed to remap resource\n");
retval = -ENOMEM;
goto err_remap;
}
Expand Down Expand Up @@ -582,9 +592,12 @@ int ca91cx42_master_set(struct vme_master_resource *image, int enabled,
unsigned int i, granularity = 0;
unsigned int temp_ctl = 0;
unsigned long long pci_bound, vme_offset, pci_base;
struct vme_bridge *ca91cx42_bridge;
struct ca91cx42_driver *bridge;

bridge = image->parent->driver_priv;
ca91cx42_bridge = image->parent;

bridge = ca91cx42_bridge->driver_priv;

i = image->number;

Expand All @@ -595,12 +608,14 @@ int ca91cx42_master_set(struct vme_master_resource *image, int enabled,

/* Verify input data */
if (vme_base & (granularity - 1)) {
printk(KERN_ERR "Invalid VME Window alignment\n");
dev_err(ca91cx42_bridge->parent, "Invalid VME Window "
"alignment\n");
retval = -EINVAL;
goto err_window;
}
if (size & (granularity - 1)) {
printk(KERN_ERR "Invalid VME Window alignment\n");
dev_err(ca91cx42_bridge->parent, "Invalid VME Window "
"alignment\n");
retval = -EINVAL;
goto err_window;
}
Expand All @@ -614,8 +629,8 @@ int ca91cx42_master_set(struct vme_master_resource *image, int enabled,
retval = ca91cx42_alloc_resource(image, size);
if (retval) {
spin_unlock(&(image->lock));
printk(KERN_ERR "Unable to allocate memory for resource "
"name\n");
dev_err(ca91cx42_bridge->parent, "Unable to allocate memory "
"for resource name\n");
retval = -ENOMEM;
goto err_res;
}
Expand Down Expand Up @@ -658,7 +673,7 @@ int ca91cx42_master_set(struct vme_master_resource *image, int enabled,
break;
default:
spin_unlock(&(image->lock));
printk(KERN_ERR "Invalid data width\n");
dev_err(ca91cx42_bridge->parent, "Invalid data width\n");
retval = -EINVAL;
goto err_dwidth;
break;
Expand Down Expand Up @@ -690,7 +705,7 @@ int ca91cx42_master_set(struct vme_master_resource *image, int enabled,
case VME_USER4:
default:
spin_unlock(&(image->lock));
printk(KERN_ERR "Invalid address space\n");
dev_err(ca91cx42_bridge->parent, "Invalid address space\n");
retval = -EINVAL;
goto err_aspace;
break;
Expand Down Expand Up @@ -921,20 +936,23 @@ int ca91cx42_dma_list_add(struct vme_dma_list *list, struct vme_dma_attr *src,
struct vme_dma_vme *vme_attr;
dma_addr_t desc_ptr;
int retval = 0;
struct device *dev;

dev = list->parent->parent->parent;

/* XXX descriptor must be aligned on 64-bit boundaries */
entry = (struct ca91cx42_dma_entry *)
kmalloc(sizeof(struct ca91cx42_dma_entry), GFP_KERNEL);
if (entry == NULL) {
printk(KERN_ERR "Failed to allocate memory for dma resource "
dev_err(dev, "Failed to allocate memory for dma resource "
"structure\n");
retval = -ENOMEM;
goto err_mem;
}

/* Test descriptor alignment */
if ((unsigned long)&(entry->descriptor) & CA91CX42_DCPP_M) {
printk("Descriptor not aligned to 16 byte boundary as "
dev_err(dev, "Descriptor not aligned to 16 byte boundary as "
"required: %p\n", &(entry->descriptor));
retval = -EINVAL;
goto err_align;
Expand All @@ -955,15 +973,15 @@ int ca91cx42_dma_list_add(struct vme_dma_list *list, struct vme_dma_attr *src,
if ((vme_attr->aspace & ~(VME_A16 | VME_A24 | VME_A32 | VME_USER1 |
VME_USER2)) != 0) {

printk(KERN_ERR "Unsupported cycle type\n");
dev_err(dev, "Unsupported cycle type\n");
retval = -EINVAL;
goto err_aspace;
}

if ((vme_attr->cycle & ~(VME_SCT | VME_BLT | VME_SUPER | VME_USER |
VME_PROG | VME_DATA)) != 0) {

printk(KERN_ERR "Unsupported cycle type\n");
dev_err(dev, "Unsupported cycle type\n");
retval = -EINVAL;
goto err_cycle;
}
Expand All @@ -972,7 +990,7 @@ int ca91cx42_dma_list_add(struct vme_dma_list *list, struct vme_dma_attr *src,
if (!(((src->type == VME_DMA_PCI) && (dest->type == VME_DMA_VME)) ||
((src->type == VME_DMA_VME) && (dest->type == VME_DMA_PCI)))) {

printk(KERN_ERR "Cannot perform transfer with this "
dev_err(dev, "Cannot perform transfer with this "
"source-destination combination\n");
retval = -EINVAL;
goto err_direct;
Expand All @@ -997,7 +1015,7 @@ int ca91cx42_dma_list_add(struct vme_dma_list *list, struct vme_dma_attr *src,
entry->descriptor.dctl |= CA91CX42_DCTL_VDW_D64;
break;
default:
printk(KERN_ERR "Invalid data width\n");
dev_err(dev, "Invalid data width\n");
return -EINVAL;
}

Expand All @@ -1019,7 +1037,7 @@ int ca91cx42_dma_list_add(struct vme_dma_list *list, struct vme_dma_attr *src,
entry->descriptor.dctl |= CA91CX42_DCTL_VAS_USER2;
break;
default:
printk(KERN_ERR "Invalid address space\n");
dev_err(dev, "Invalid address space\n");
return -EINVAL;
break;
}
Expand Down Expand Up @@ -1079,12 +1097,13 @@ int ca91cx42_dma_list_exec(struct vme_dma_list *list)
int retval = 0;
dma_addr_t bus_addr;
u32 val;

struct device *dev;
struct ca91cx42_driver *bridge;

ctrlr = list->parent;

bridge = ctrlr->parent->driver_priv;
dev = ctrlr->parent->parent;

mutex_lock(&(ctrlr->mtx));

Expand Down Expand Up @@ -1140,7 +1159,7 @@ int ca91cx42_dma_list_exec(struct vme_dma_list *list)
if (val & (CA91CX42_DGCS_LERR | CA91CX42_DGCS_VERR |
CA91CX42_DGCS_PERR)) {

printk(KERN_ERR "ca91c042: DMA Error. DGCS=%08X\n", val);
dev_err(dev, "ca91c042: DMA Error. DGCS=%08X\n", val);
val = ioread32(bridge->base + DCTL);
}

Expand Down
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